lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <c72fceed58cdcb6093f1c1323416426c8237782b.camel@mellanox.com>
Date:   Tue, 15 Oct 2019 20:29:36 +0000
From:   Saeed Mahameed <saeedm@...lanox.com>
To:     "mkubecek@...e.cz" <mkubecek@...e.cz>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
CC:     "stephen@...workplumber.org" <stephen@...workplumber.org>,
        "leon@...nel.org" <leon@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        "bp@...en8.de" <bp@...en8.de>, Alex Vesker <valex@...lanox.com>
Subject: Re: ERROR: "__umoddi3"
 [drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.ko] undefined!

On Tue, 2019-10-01 at 17:14 +0200, Michal Kubecek wrote:
> On Mon, Sep 30, 2019 at 08:40:31PM +0200, Borislav Petkov wrote:
> > On Mon, Sep 30, 2019 at 09:55:16AM -0700, Stephen Hemminger wrote:
> > > Could also us div_u64_rem here?
> > 
> > Yah, the below seems to work and the resulting asm looks sensible
> > to me
> > but someone should definitely double-check me as I don't know this
> > code
> > at all.
> > 
> > Thx.
> > 
> > diff --git
> > a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
> > b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
> > index 913f1e5aaaf2..b4302658e5f8 100644
> > ---
> > a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
> > +++
> > b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c
> > @@ -137,7 +137,7 @@ dr_icm_pool_mr_create(struct mlx5dr_icm_pool
> > *pool,
> >  
> >  	icm_mr->icm_start_addr = icm_mr->dm.addr;
> >  
> > -	align_diff = icm_mr->icm_start_addr % align_base;
> > +	div_u64_rem(icm_mr->icm_start_addr, align_base, &align_diff);
> >  	if (align_diff)
> >  		icm_mr->used_length = align_base - align_diff;
> >  
> > 
> 
> While this fixes 32-bit builds, it breaks 64-bit ones as align_diff
> is
> 64-bit and div_u64_rem expects pointer to u32. :-(
> 
> I checked that align_base is always a power of two so that we could
> get
> away with
> 
> 	align_diff = icm_mr->icm_start_addr & (align_base - 1)
> 
> I'm not sure, however, if it's safe to assume align_base will always
> have to be a power of two or if we should add a check for safety.
> 
> (Cc-ing also author of commit 29cf8febd185 ("net/mlx5: DR, ICM pool
> memory allocator").)
> 

Thanks everyone for your input on this, Alex will take care of this and
we will submit a patch ..


> Michal

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ