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Message-ID: <20191016121216.GD4780@lunn.ch>
Date: Wed, 16 Oct 2019 14:12:16 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Oleksij Rempel <o.rempel@...gutronix.de>
Cc: Chris Snook <chris.snook@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
James Hogan <jhogan@...nel.org>,
Jay Cliburn <jcliburn@...il.com>,
Mark Rutland <mark.rutland@....com>,
Paul Burton <paul.burton@...s.com>,
Ralf Baechle <ralf@...ux-mips.org>,
Rob Herring <robh+dt@...nel.org>,
Russell King <linux@...linux.org.uk>,
Vivien Didelot <vivien.didelot@...il.com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-mips@...r.kernel.org
Subject: Re: [PATCH v1 1/4] net: ag71xx: port to phylink
On Mon, Oct 14, 2019 at 08:15:46AM +0200, Oleksij Rempel wrote:
> The port to phylink was done as close as possible to initial
> functionality.
> Theoretically this HW can support flow control, practically seems to be not
> enough to just enable it. So, more work should be done.
>
> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
Hi Oleksij
Please include Russell King in Cc: in future.
> -static void ag71xx_phy_link_adjust(struct net_device *ndev)
> +static void ag71xx_mac_validate(struct phylink_config *config,
> + unsigned long *supported,
> + struct phylink_link_state *state)
> {
> - struct ag71xx *ag = netdev_priv(ndev);
> + __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
> +
> + if (state->interface != PHY_INTERFACE_MODE_NA &&
> + state->interface != PHY_INTERFACE_MODE_GMII &&
> + state->interface != PHY_INTERFACE_MODE_MII) {
> + bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
> + return;
> + }
> +
> + phylink_set(mask, MII);
> +
> + /* flow control is not supported */
>
> - ag71xx_link_adjust(ag, true);
> + phylink_set(mask, 10baseT_Half);
> + phylink_set(mask, 10baseT_Full);
> + phylink_set(mask, 100baseT_Half);
> + phylink_set(mask, 100baseT_Full);
> +
> + phylink_set(mask, 1000baseT_Full);
> + phylink_set(mask, 1000baseX_Full);
Can the MAC/PHY dynamically switch between MII and GMII? Maybe you
should only add 1G support when interface is GMII?
> @@ -1239,6 +1255,13 @@ static int ag71xx_open(struct net_device *ndev)
> unsigned int max_frame_len;
> int ret;
>
> + ret = phylink_of_phy_connect(ag->phylink, ag->pdev->dev.of_node, 0);
> + if (ret) {
> + netif_info(ag, link, ndev, "phylink_of_phy_connect filed with err: %i\n",
> + ret);
netif_info seems wrong. _err()?
Andrew
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