netdev - Re: [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK

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Message-ID: <20191023154024.GC13748@lunn.ch>
Date:   Wed, 23 Oct 2019 17:40:24 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Martin Fuzzey <martin.fuzzey@...wbird.group>
Cc:     netdev@...r.kernel.org
Subject: Re: [PATCH] net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag

On Wed, Oct 23, 2019 at 11:44:24AM +0200, Martin Fuzzey wrote:
> The LAN8740, like the 8720, also requires a reset after enabling clock.
> The datasheet [1] 3.8.5.1 says:
> 	"During a Hardware reset, an external clock must be supplied
> 	to the XTAL1/CLKIN signal."
> 
> I have observed this issue on a custom i.MX6 based board with
> the LAN8740A.
> 
> [1] http://ww1.microchip.com/downloads/en/DeviceDoc/8740a.pdf
> 
> Signed-off-by: Martin Fuzzey <martin.fuzzey@...wbird.group>

Reviewed-by: Andrew Lunn <andrew@...n.ch>

    Andrew