netdev - Re: sun7i-dwmac: link detection failure with 1000Mbit parters

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Message-ID: <20191031131404.GK10555@lunn.ch>
Date:   Thu, 31 Oct 2019 14:14:04 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     Priit Laes <plaes@...es.org>
Cc:     linux-sunxi@...glegroups.com, wens@...e.org,
        netdev@...r.kernel.org, peppe.cavallaro@...com,
        alexandre.torgue@...com, joabreu@...opsys.com
Subject: Re: sun7i-dwmac: link detection failure with 1000Mbit parters

On Thu, Oct 31, 2019 at 02:04:22PM +0100, Andrew Lunn wrote:
> On Wed, Oct 30, 2019 at 08:21:17PM +0000, Priit Laes wrote:
> > Heya!
> > 
> > I have noticed that with sun7i-dwmac driver (OLinuxino Lime2 eMMC), link
> > detection fails consistently with certain 1000Mbit partners (for example Huawei
> > B525s-23a 4g modem ethernet outputs and RTL8153-based USB3.0 ethernet dongle),
> > but the same hardware works properly with certain other link partners (100Mbit GL AR150
> > for example).
> 
> Hi Pritt
> 
> What PHY is used? And what happens if you use the specific PHY driver,
> not the generic PHY driver?

Schematics of the board are here:

https://github.com/OLIMEX/OLINUXINO/blob/master/HARDWARE/A20-OLinuXino-LIME2/1.%20Latest%20hardware%20revision/A20-OLinuXino-Lime2_Rev_K2_COLOR.pdf

So it has a KSZ9031. The micrel driver supports that device. And there
is a patch which might be relevant:

ommit 3aed3e2a143c9619f4c8d0a3b8fe74d7d3d79c93
Author: Antoine Tenart <antoine.tenart@...tlin.com>
Date:   Tue Apr 16 12:10:20 2019 +0200

    net: phy: micrel: add Asym Pause workaround
    
    The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric
    Pause capability is set. This issue is described in a Silicon Errata
    (DS80000691D or DS80000692D), which advises to always disable the
    capability. This patch implements the workaround by defining a KSZ9031
    specific get_feature callback to force the Asymmetric Pause capability
    bit to be cleared.
    
    This fixes issues where the link would not come up at boot time, or when
    the Asym Pause bit was set later on.
    
    Signed-off-by: Antoine Tenart <antoine.tenart@...tlin.com>
    Reviewed-by: Andrew Lunn <andrew@...n.ch>
    Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
    Signed-off-by: David S. Miller <davem@...emloft.net>


Please test using the Micrel PHY driver and see if that solves your
problem.

	Andrew