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Message-Id: <20191102141508.4416-1-yanghansen1@163.com>
Date:   Sat,  2 Nov 2019 22:15:08 +0800
From:   Hansen Yang <yanghansen1@....com>
To:     andrew@...n.ch
Cc:     f.fainelli@...il.com, hkallweit1@...il.com, davem@...emloft.net,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        496645649@...com, Hansen Yang <yanghansen1@....com>
Subject: [PATCH] net: phy: marvell: Fix bits clear bug

The correct way to clear bits before setting some of them is using
"& = ~BIT_MASK".
The wrong operation "& = BIT_MASK" will clear other bits.

m88e1116r_config_init() calls marvell_set_polarity() to config
MDI crossover mode by modifying reg MII_M1011_PHY_SCR, then it
calls marvell_set_downshift() to config downshift by modifying
the same reg. According to the bug, marvell_set_downshift()
clears other bits and set MDI Crossover Mode to Manual MDI
configuration. If we connect two devices both using this driver
with a wrong Ethernet cable, they can't automatically adjust
their crossover mode. Finally they fail to link.

Signed-off-by: Hansen Yang <yanghansen1@....com>
---
 drivers/net/phy/marvell.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index a7796134e3be..6ab8fe339043 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -282,7 +282,7 @@ static int marvell_set_downshift(struct phy_device *phydev, bool enable,
 	if (reg < 0)
 		return reg;
 
-	reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
+	reg &= ~MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
 	reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
 	if (enable)
 		reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
-- 
2.17.1


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