netdev - Re: [PATCH net-next 15/15] net: mscc: ocelot: don't hardcode the number of the CPU port

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Message-ID: <CA+h21hoDvAX7NgUL0VxkBwyaAst6cr_-xTz9=7T+CANqV=Zv9A@mail.gmail.com>
Date:   Sun, 10 Nov 2019 19:00:33 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Jakub Kicinski <jakub.kicinski@...ronome.com>,
        "David S. Miller" <davem@...emloft.net>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Joergen Andreasen <joergen.andreasen@...rochip.com>,
        "Allan W. Nielsen" <allan.nielsen@...rochip.com>,
        Horatiu Vultur <horatiu.vultur@...rochip.com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        netdev <netdev@...r.kernel.org>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH net-next 15/15] net: mscc: ocelot: don't hardcode the
 number of the CPU port

On Sun, 10 Nov 2019 at 18:50, Andrew Lunn <andrew@...n.ch> wrote:
>
> On Sat, Nov 09, 2019 at 03:03:01PM +0200, Vladimir Oltean wrote:
> > From: Vladimir Oltean <vladimir.oltean@....com>
> >
> > VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the
> > queuing subsystem for terminating traffic locally).
>
> So maybe that answers my last question.
>
> > There are 2 issues with hardcoding the CPU port as #10:
> > - It is not clear which snippets of the code are configuring something
> >   for one of the CPU ports, and which snippets are just doing something
> >   related to the number of physical ports.
> > - Actually any physical port can act as a CPU port connected to an
> >   external CPU (in addition to the local CPU). This is called NPI mode
> >   (Node Processor Interface) and is the way that the 6-port VSC9959
> >   (Felix) switch is integrated inside NXP LS1028A (the "local management
> >   CPU" functionality is not used there).
>
> So i'm having trouble reading this and spotting the difference between
> the DSA concept of a CPU port and the two extra "CPU ports". Maybe
> using the concept of virtual ports would help?
>
> Are the physical ports number 0-9, and so port #10 is the first extra
> "CPU port", aka a virtual port? And so that would not work for DSA,
> where you need a physical port.
>
>       Andrew

Right. See my other answer which links to Ocelot documentation. The
3.14 chapter "CPU Port Module" should clarify. The switch core has a
number of CPU ports (typically 2) which are to be integrated with
SoC-specific frame transfer abilities, typically DMA. The way this was
integrated in LS1028A is described by: "It is also possible to use a
regular front port as a CPU port. This is known as a Node Processor
Interface (NPI)." So the embedded switch and the rest of the system
are strangers and talk over Ethernet (the 2 "virtual" CPU ports are
not used), hence the reason why the "normal" (virtual, etc) CPU ports
are better modelled as switchdev and the "NPI" CPU port is better
modelled as DSA.