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Date: Mon, 11 Nov 2019 09:26:52 -0800
From: Tony Lindgren <tony@...mide.com>
To: Grygorii Strashko <grygorii.strashko@...com>
Cc: Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org,
Ilias Apalodimas <ilias.apalodimas@...aro.org>,
Andrew Lunn <andrew@...n.ch>,
"David S . Miller" <davem@...emloft.net>,
Ivan Khoronzhuk <ivan.khoronzhuk@...aro.org>,
Jiri Pirko <jiri@...nulli.us>, Sekhar Nori <nsekhar@...com>,
linux-kernel@...r.kernel.org, linux-omap@...r.kernel.org,
Murali Karicheri <m-karicheri2@...com>,
Ivan Vecera <ivecera@...hat.com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Subject: Re: [PATCH v6 net-next 06/13] dt-bindings: net: ti: add new cpsw
switch driver bindings
Hi,
* Grygorii Strashko <grygorii.strashko@...com> [191109 15:17]:
> + mac_sw: switch@0 {
> + compatible = "ti,dra7-cpsw-switch","ti,cpsw-switch";
> + reg = <0x0 0x4000>;
> + ranges = <0 0 0x4000>;
> + clocks = <&gmac_main_clk>;
> + clock-names = "fck";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + syscon = <&scm_conf>;
> + inctrl-names = "default", "sleep";
> +
> + interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "rx_thresh", "rx", "tx", "misc";
I think with the ti-sysc managing the interconnect target module as the
parent of this, you should be able add all the modules as direct children
of ti-sysc with minor fixups. This would simplify things, and makes it
easier to update the driver later on when the child modules get
changed/updated/moved around.
The child modules just need to call PM runtime to have access to their
registers, and whatever cpsw control module part could be a separate
driver providing Linux standard services for example for clock gating :)
> + davinci_mdio_sw: mdio@...0 {
> + compatible = "ti,cpsw-mdio","ti,davinci_mdio";
> + reg = <0x1000 0x100>;
> + clocks = <&gmac_clkctrl DRA7_GMAC_GMAC_CLKCTRL 0>;
> + clock-names = "fck";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + bus_freq = <1000000>;
> +
> + ethphy0_sw: ethernet-phy@0 {
> + reg = <0>;
> + };
> +
> + ethphy1_sw: ethernet-phy@1 {
> + reg = <41>;
> + };
> + };
And in this case, mdio above would just move up one level.
This goes back to my earlier comments saying the cpsw is really just
a private interconnect with a collection of various mostly independent
modules. Sounds like you're heading that way already though at the
driver level :)
Regards,
Tony
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