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Message-ID: <CA+h21hqT=rGdTTEEv06X_QHmwY_MvzA+eFXzdCfdU+=+4sGOZw@mail.gmail.com>
Date:   Tue, 12 Nov 2019 15:38:10 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Jakub Kicinski <jakub.kicinski@...ronome.com>,
        "David S. Miller" <davem@...emloft.net>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Joergen Andreasen <joergen.andreasen@...rochip.com>,
        "Allan W. Nielsen" <allan.nielsen@...rochip.com>,
        Horatiu Vultur <horatiu.vultur@...rochip.com>,
        Claudiu Manoil <claudiu.manoil@....com>,
        netdev <netdev@...r.kernel.org>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH net-next 03/12] net: mscc: ocelot: move invariant configs
 out of adjust_link

On Tue, 12 Nov 2019 at 15:35, Andrew Lunn <andrew@...n.ch> wrote:
>
> On Tue, Nov 12, 2019 at 02:44:11PM +0200, Vladimir Oltean wrote:
> > From: Vladimir Oltean <vladimir.oltean@....com>
> >
> > It doesn't make sense to rewrite all these registers every time the PHY
> > library notifies us about a link state change.
> >
> > In a future patch we will customize the MTU for the CPU port, and since
> > the MTU was previously configured from adjust_link, if we don't make
> > this change, its value would have got overridden.
>
> This is also a good change in preparation of PHYLINK.  When you do
> that conversion, ocelot_adjust_link() is likely to become
> ocelot_mac_config(). It should only change hardware state when there
> actually is a change in link state. This is something drivers often
> get wrong.
>

Yes. We'll need PHYLINK because the CPU port is 2.5G fixed-link, which
is something PHYLIB can't describe. One at a time, though.

> > Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
>
>     Andrew
>
>

[snip]

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