lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Sun, 17 Nov 2019 10:36:02 -0800 (PST) From: David Miller <davem@...emloft.net> To: sunil.kovvuri@...il.com Cc: netdev@...r.kernel.org, apinski@...vell.com, pbhagavatula@...vell.com, sgoutham@...vell.com Subject: Re: [PATCH 12/15] octeontx2-af: Add TIM unit support. From: sunil.kovvuri@...il.com Date: Sun, 17 Nov 2019 21:44:23 +0530 > +static u64 get_tenns_tsc(void) > +{ > + u64 tsc = 0; > + > +#if defined(CONFIG_ARM64) > + asm volatile("mrs %0, cntvct_el0" : "=r" (tsc)); > +#endif > + return tsc; > +} > + > +static u64 get_tenns_clk(void) > +{ > + u64 tsc = 0; > + > +#if defined(CONFIG_ARM64) > + asm volatile("mrs %0, cntfrq_el0" : "=r" (tsc)); > +#endif > + return tsc; > +} You cannot do this. Read the tick register of the cpu in a portable way, we have interfaces for this. If not, create one.
Powered by blists - more mailing lists