netdev - Re: [RFC PATCH 2/4] b44: Fix off-by-one error in acceptable address range

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Message-Id: <201912091801.xB9I192b025088@sdf.org>
Date:   Mon, 9 Dec 2019 18:01:09 GMT
From:   George Spelvin <lkml@....org>
To:     lkml@....org, michael.chan@...adcom.com
Cc:     hauke@...ke-m.de, netdev@...r.kernel.org
Subject: Re: [RFC PATCH 2/4] b44: Fix off-by-one error in acceptable address range

>From michael.chan@...adcom.com Mon Dec  9 17:30:02 2019
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From: Michael Chan <michael.chan@...adcom.com>
Date: Mon, 9 Dec 2019 09:29:46 -0800
Subject: Re: [RFC PATCH 2/4] b44: Fix off-by-one error in acceptable address range
To: George Spelvin <lkml@....org>
Cc: Netdev <netdev@...r.kernel.org>, Hauke Mehrtens <hauke@...ke-m.de>
Content-Type: text/plain; charset="UTF-8"

On Mon, 9 Dec 2019 at 09:29:46 Michael Chan wrote:
> The patchset looks ok to me.  The only minor suggestion is to define
> this (DMA_BIT_MASK(30) + 1) as B44_DMA_ADDR_LIMIT or something like
> that so you don't have to repeat it so many times.

Thank you for the prompt reply.  Yes, that's a sensible thing to do.
There's an existing constant I can use: SSB_PCI_DMA_SZ.

Do you have any idea about the WARN_ON_ONCE in report_addr()?  That's
a someone more invasive issue.  E.g. should it be changed to also
honour the NO_WARN flag?

Looking at the 440x datasheet, one significantly more ambitious
thing I wonder about is if it would be possible to map the swiotlb
using SBToPCITranslation[01] and let that layer do the heavy lifting.
The translation registers are set up, but I don't see them ever actually
used for anything on these chips.  (But I havnn't grokked all the
drivers/ssb code yet, so I might have missed something.)