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Date:   Thu, 12 Dec 2019 14:19:02 +0000
From:   Andreas Tobler <andreas.tobler@...ay.ch>
To:     Andrew Lunn <andrew@...n.ch>, Baruch Siach <baruch@...s.co.il>
CC:     Vivien Didelot <vivien.didelot@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Denis Odintsov <d.odintsov@...viangames.com>,
        Hubert Feurstein <h.feurstein@...il.com>
Subject: Re: [BUG] mv88e6xxx: tx regression in v5.3

On 12.12.19 14:14, Andrew Lunn wrote:
>> As you guessed, mv88e6xxx_mac_config() exits early because
>> mv88e6xxx_phy_is_internal() returns true for port number 2, and 'mode' is
>> MLO_AN_PHY. What is the right MAC/PHY setup flow in this case?
> 
> So this goes back to
> 
> commit d700ec4118f9d5e88db8f678e7342f28c93037b9
> Author: Marek Vasut <marex@...x.de>
> Date:   Wed Sep 12 00:15:24 2018 +0200
> 
>      net: dsa: mv88e6xxx: Make sure to configure ports with external PHYs
>      
>      The MV88E6xxx can have external PHYs attached to certain ports and those
>      PHYs could even be on different MDIO bus than the one within the switch.
>      This patch makes sure that ports with such PHYs are configured correctly
>      according to the information provided by the PHY.
> 
> @@ -709,13 +717,17 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port,
>          struct mv88e6xxx_chip *chip = ds->priv;
>          int speed, duplex, link, pause, err;
>   
> -       if (mode == MLO_AN_PHY)
> +       if ((mode == MLO_AN_PHY) && mv88e6xxx_phy_is_internal(ds, port))
>                  return;
> 
> The idea being, that the MAC has direct knowledge of the PHY
> configuration because it is internal. There is no need to configure
> the MAC, it does it itself.
> 
> This assumption seems wrong for the switch you have.
> 
> I think it is just a optimisation. So we can probably remove this phy
> internal test.
> 
> And
>          } else if (!mv88e6xxx_phy_is_internal(ds, port)) {
> 
> also needs to change.
> 
> It would be interesting to know if the MAC is completely wrongly
> configured, or it is just a subset of parameters.

Interesting that you mention the patch above.

I jump in because I have an issue since the above patch went in.

In my case (see below) the links are up and running fine, but when I 
disconnect the lan on port 8 or 9, I do not get the IP back. The same 
applies if I set the device down and up again. I loose the ip and do not 
get it again.

If I set the link in the above 'else if' clause to LINK_UNFORCED, I get 
my ip's back and the links are working again.

         } else if (!mv88e6xxx_phy_is_internal(ds, port)) {
-               link = state->link;
+               link = LINK_UNFORCED;
                 speed = state->speed;

I hope I did not hijack the thread an my situation is related. Otherwise 
please let me know.

Thanks,
Andreas

The lan0/1/2 are 100M, lan3/4 are 1G

my switch info from the log, 5.4.2:

mv88e6085 f1072004.mdio-mii:00: switch 0x990 detected: Marvell 
88E6097/88E6097F, revision 2
libphy: mv88e6xxx SMI: probed
mv88e6085 f1072004.mdio-mii:00 lan0 (uninitialized): PHY 
[mv88e6xxx-1:05] driver [Generic PHY]
mv88e6085 f1072004.mdio-mii:00 lan1 (uninitialized): PHY 
[mv88e6xxx-1:06] driver [Generic PHY]
mv88e6085 f1072004.mdio-mii:00 lan2 (uninitialized): PHY 
[mv88e6xxx-1:07] driver [Generic PHY]
mv88e6085 f1072004.mdio-mii:00 lan3 (uninitialized): PHY 
[mv88e6xxx-1:08] driver [Marvell 88E1112]
mv88e6085 f1072004.mdio-mii:00 lan4 (uninitialized): PHY 
[mv88e6xxx-1:09] driver [Marvell 88E1112]




-- 
onway ag
Andreas Tobler
Software Engineer

Stauffacherstrasse 16, CH-8004 Zürich
Tel: +41 55 214 18 42
andreas.tobler@...ay.ch
www.onway.ch

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