[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20191225005655.1502037-3-martin.blumenstingl@googlemail.com>
Date: Wed, 25 Dec 2019 01:56:54 +0100
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: linux-amlogic@...ts.infradead.org, netdev@...r.kernel.org,
davem@...emloft.net, khilman@...libre.com
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
balbes-150@...dex.ru, ingrassia@...genesys.com,
jbrunet@...libre.com, linus.luessing@...3.blue,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH 2/3] ARM: dts: meson8b: odroidc1: use the same RGMII TX delay as u-boot
Due to a bug in the MPLL2 clock setup (which is used as input for the
RGMII TX clock) a TX delay of 2ns did not work previously. With a TX
delay of 4ns Ethernet worked enough to get an IP via DHCP but there was
still high packet loss when transmitting data.
Update the TX delay to 2ns - which is the same value that u-boot and the
vendor kernel use - to fix the packet loss when transmitting data.
Fixes: 9c15795a4f96cb ("ARM: dts: meson8b-odroidc1: ethernet support")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index a2a47804fc4a..e2ba2d66d8d9 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -204,7 +204,7 @@ ðmac {
phy-mode = "rgmii";
phy-handle = <ð_phy>;
- amlogic,tx-delay-ns = <4>;
+ amlogic,tx-delay-ns = <2>;
nvmem-cells = <ðernet_mac_address>;
nvmem-cell-names = "mac-address";
--
2.24.1
Powered by blists - more mailing lists