netdev - Re: [PATCH 1/6] net: phy: add interface modes for XFI, SFI

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Date:   Mon, 6 Jan 2020 14:57:59 +0100
From:   Andrew Lunn <andrew@...n.ch>
To:     "Madalin Bucur (OSS)" <madalin.bucur@....nxp.com>
Cc:     Russell King - ARM Linux admin <linux@...linux.org.uk>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "f.fainelli@...il.com" <f.fainelli@...il.com>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>
Subject: Re: [PATCH 1/6] net: phy: add interface modes for XFI, SFI

> You missed my argument about the device tree describing the HW (thus the
> wires, electrical aspects too) and not configuring a certain protocol (the
> device tree does not configure HW, it describes HW).

Hi Madalin

You have lots of different points here. I'm just picking out one.

I would say this is a grey area. You need to ensure both devices on
the XFI bus are using the same protocol. There are a few ways you
could do this:

The MAC and the PHY tells phylink what each is capable of, and phylink
picks a common protocol.

Leave it to the boot loader/firmware and cross your fingers.

Make a design decision, this board will use protocol X, and put that
in device tree. It is describing how we expect the hardware to be
used.

The Marvell SERDES interfaces are pretty generic. They can be used for
SATA, USB3, or networking. But these are all protocols running on top
of SERDES. So would you argue we cannot describe in device tree that
one SERDES is to be used for USB and another for SATA?

    Andrew