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Date:   Wed,  8 Jan 2020 20:05:31 +0200
From:   Yishai Hadas <yishaih@...lanox.com>
To:     linux-rdma@...r.kernel.org, jgg@...lanox.com, dledford@...hat.com
Cc:     saeedm@...lanox.com, yishaih@...lanox.com, maorg@...lanox.com,
        michaelgur@...lanox.com, netdev@...r.kernel.org
Subject: [PATCH rdma-next 01/10] net/mlx5: Expose relaxed ordering bits

From: Michael Guralnik <michaelgur@...lanox.com>

Expose relaxed ordering bits in HCA capability and mkey context structs.

Signed-off-by: Yishai Hadas <yishaih@...lanox.com>
Signed-off-by: Michael Guralnik <michaelgur@...lanox.com>
---
 include/linux/mlx5/mlx5_ifc.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 5d54fcc..8edcca4 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -1160,7 +1160,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
 	u8         log_max_cq[0x5];
 
 	u8         log_max_eq_sz[0x8];
-	u8         reserved_at_e8[0x2];
+	u8         relaxed_ordering_write[0x1];
+	u8         relaxed_ordering_read[0x1];
 	u8         log_max_mkey[0x6];
 	u8         reserved_at_f0[0x8];
 	u8         dump_fill_mkey[0x1];
@@ -3271,7 +3272,9 @@ struct mlx5_ifc_mkc_bits {
 
 	u8         translations_octword_size[0x20];
 
-	u8         reserved_at_1c0[0x1b];
+	u8         reserved_at_1c0[0x19];
+	u8         relaxed_ordering_read[0x1];
+	u8         reserved_at_1d9[0x1];
 	u8         log_page_size[0x5];
 
 	u8         reserved_at_1e0[0x20];
-- 
1.8.3.1

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