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Date:   Tue, 14 Jan 2020 17:55:27 +0200
From:   Moshe Shemesh <moshe@...lanox.com>
To:     "David S. Miller" <davem@...emloft.net>
Cc:     Alexander Duyck <alexander.duyck@...il.com>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        Moshe Shemesh <moshe@...lanox.com>
Subject: [PATCH net-next RFC 2/3] net/mlx5: Add functions to set/query MFRL register

Add functions to set the reset level required and to query the reset
levels supported by fw.

Signed-off-by: Moshe Shemesh <moshe@...lanox.com>
---
 drivers/net/ethernet/mellanox/mlx5/core/fw.c       | 44 ++++++++++++++++++++++
 .../net/ethernet/mellanox/mlx5/core/mlx5_core.h    |  2 +
 2 files changed, 46 insertions(+)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
index 1723229..1c6dfe9 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
@@ -769,3 +769,47 @@ int mlx5_fw_version_query(struct mlx5_core_dev *dev,
 
 	return 0;
 }
+
+static int mlx5_reg_mfrl_set(struct mlx5_core_dev *dev, u8 reset_level,
+			     u8 reset_type_sel)
+{
+	u32 out[MLX5_ST_SZ_DW(mfrl_reg)];
+	u32 in[MLX5_ST_SZ_DW(mfrl_reg)] = {};
+
+	MLX5_SET(mfrl_reg, in, reset_level, reset_level);
+	MLX5_SET(mfrl_reg, in, rst_type_sel, reset_type_sel);
+
+	return mlx5_core_access_reg(dev, in, sizeof(in), out,
+				    sizeof(out), MLX5_REG_MFRL, 0, 1);
+}
+
+static int mlx5_reg_mfrl_query(struct mlx5_core_dev *dev, u8 *reset_level,
+			       u8 *reset_type_sel, u8 *reset_type)
+{
+	u32 out[MLX5_ST_SZ_DW(mfrl_reg)] = {};
+	u32 in[MLX5_ST_SZ_DW(mfrl_reg)] = {};
+	int err;
+
+	err = mlx5_core_access_reg(dev, in, sizeof(in), out,
+				   sizeof(out), MLX5_REG_MFRL, 0, 0);
+	if (err)
+		return err;
+
+	*reset_level = MLX5_GET(mfrl_reg, out, reset_level);
+	*reset_type = MLX5_GET(mfrl_reg, out, reset_type);
+	*reset_type_sel = MLX5_GET(mfrl_reg, out, rst_type_sel);
+
+	return 0;
+}
+
+int mlx5_fw_query_reset_level(struct mlx5_core_dev *dev, u8 *reset_level)
+{
+	u8 reset_type_sel, reset_type;
+
+	return mlx5_reg_mfrl_query(dev, reset_level, &reset_type_sel, &reset_type);
+}
+
+int mlx5_fw_set_reset_level(struct mlx5_core_dev *dev, u8 reset_level)
+{
+	return mlx5_reg_mfrl_set(dev, reset_level, 0);
+}
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
index da67b28..1b55a5a 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
@@ -210,6 +210,8 @@ int mlx5_firmware_flash(struct mlx5_core_dev *dev, const struct firmware *fw,
 			struct netlink_ext_ack *extack);
 int mlx5_fw_version_query(struct mlx5_core_dev *dev,
 			  u32 *running_ver, u32 *stored_ver);
+int mlx5_fw_query_reset_level(struct mlx5_core_dev *dev, u8 *reset_level);
+int mlx5_fw_set_reset_level(struct mlx5_core_dev *dev, u8 reset_level);
 
 void mlx5e_init(void);
 void mlx5e_cleanup(void);
-- 
1.8.3.1

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