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Date:   Thu, 23 Jan 2020 01:04:10 +0530
From:   Sunil Kovvuri <sunil.kovvuri@...il.com>
To:     Jakub Kicinski <kuba@...nel.org>
Cc:     Linux Netdev List <netdev@...r.kernel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Michal Kubecek <mkubecek@...e.cz>,
        Sunil Goutham <sgoutham@...vell.com>
Subject: Re: [PATCH v4 06/17] octeontx2-pf: Receive packet handling support

On Tue, Jan 21, 2020 at 10:03 PM Jakub Kicinski <kuba@...nel.org> wrote:
>
> On Tue, 21 Jan 2020 18:51:40 +0530, sunil.kovvuri@...il.com wrote:
> >  static int otx2_rx_napi_handler(struct otx2_nic *pfvf,
> >                               struct napi_struct *napi,
> >                               struct otx2_cq_queue *cq, int budget)
>
> > +     int processed_cqe = 0;
> > +     s64 bufptr;
> > +
> > +     /* Make sure HW writes to CQ are done */
> > +     dma_rmb();
>
> What is this memory barrier between?
>
> Usually dma_rmb() barrier is placed between accesses to the part of the
> descriptor which tells us device is done and the rest of descriptor
> accesses.
>

Will recheck, i think this can be removed.
Previously the logic was different and used to read number of valid
descriptor count from HW
and a barrier between that and descriptor processing was needed.

Thanks,
Sunil.

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