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Message-ID: <20200129214805.l4djnzrzpk7inkvk@pengutronix.de>
Date:   Wed, 29 Jan 2020 22:48:05 +0100
From:   Michael Grzeschik <mgr@...gutronix.de>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     f.fainelli@...il.com, netdev@...r.kernel.org, davem@...emloft.net,
        kernel@...gutronix.de
Subject: Re: [PATCH] mdio-bitbang: add support for lowlevel mdio read/write

On Wed, Jan 29, 2020 at 04:53:46PM +0100, Andrew Lunn wrote:
> On Wed, Jan 29, 2020 at 04:42:01PM +0100, Michael Grzeschik wrote:
> > Hi Andrew!
> > 
> > I tested your patch. But it works only partially. For the case that
> > the upper driver is directly communicating in SMI mode with the phy,
> > this works fine. But the regular MDIO connection does not work anymore
> > afterwards.
> > 
> > The normals MDIO communication still needs to work, as mdio-gpio is
> > calling of_mdiobus_register that on the other end calls get_phy_device
> > and tries to communicate via regular MDIO to the device.
> 
> Do you mean you have a mix of devices on the bus, some standards
> comformant, and others using this hacked up SMI0 mode?

Actually it is the same device used in both modes. The SMI0
mode is used by the switch driver to address the extended switch
functions. But on the same bus we have the fec connected to
the cpu bound fixed-phy (microchip,ks8863) via MDIO.

> You need to specify per device if SMI0 should be used?

Yes, we have to use the same bus fot both modes SMI0 and MDIO.

 Michael

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