lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <05adc7cc-19cb-7e6e-f6df-07ec8f5e841f@st.com>
Date:   Thu, 30 Jan 2020 13:30:05 +0000
From:   Christophe ROULLIER <christophe.roullier@...com>
To:     David Miller <davem@...emloft.net>
CC:     "joabreu@...opsys.com" <joabreu@...opsys.com>,
        "mcoquelin.stm32@...il.com" <mcoquelin.stm32@...il.com>,
        Alexandre TORGUE <alexandre.torgue@...com>,
        Peppe CAVALLARO <peppe.cavallaro@...com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-stm32@...md-mailman.stormreply.com" 
        <linux-stm32@...md-mailman.stormreply.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH 1/1] net: ethernet: stmmac: simplify phy modes management
 for stm32

On 1/29/20 11:51 AM, David Miller wrote:
> From: Christophe Roullier <christophe.roullier@...com>
> Date: Tue, 28 Jan 2020 09:39:42 +0100
>
>> No new feature, just to simplify stm32 part to be easier to use.
>> Add by default all Ethernet clocks in DT, and activate or not in function
>> of phy mode, clock frequency, if property "st,ext-phyclk" is set or not.
>> Keep backward compatibility
>> -----------------------------------------------------------------------
>> |PHY_MODE | Normal | PHY wo crystal|   PHY wo crystal   |  No 125Mhz  |
>> |         |        |      25MHz    |        50MHz       |  from PHY   |
>> -----------------------------------------------------------------------
>> |  MII    |	 -    |     eth-ck    |       n/a          |	    n/a  |
>> |         |        | st,ext-phyclk |                    |             |
>> -----------------------------------------------------------------------
>> |  GMII   |	 -    |     eth-ck    |       n/a          |	    n/a  |
>> |         |        | st,ext-phyclk |                    |             |
>> -----------------------------------------------------------------------
>> | RGMII   |	 -    |     eth-ck    |       n/a          |      eth-ck  |
>> |         |        | st,ext-phyclk |                    |st,eth-clk-sel|
>> |         |        |               |                    |       or     |
>> |         |        |               |                    | st,ext-phyclk|
>> ------------------------------------------------------------------------
>> | RMII    |	 -    |     eth-ck    |      eth-ck        |	     n/a  |
>> |         |        | st,ext-phyclk | st,eth-ref-clk-sel |              |
>> |         |        |               | or st,ext-phyclk   |              |
>> ------------------------------------------------------------------------
>>
>> Signed-off-by: Christophe Roullier <christophe.roullier@...com>
> If anything, this is more of a cleanup, and therefore only appropriate for
> net-next when it opens back up.
Thanks David, It is not urgent, do you want that I re-push it with 
"PATCH net next" ?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ