netdev - Re: [PATCH 2/6] net: bcmgenet: refactor phy mode configuration

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Message-ID: <0d743b51-fd77-db8c-1910-c725c4b2e7b9@arm.com>
Date:   Mon, 3 Feb 2020 12:46:31 -0600
From:   Jeremy Linton <jeremy.linton@....com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        Andrew Lunn <andrew@...n.ch>
Cc:     netdev@...r.kernel.org, opendmb@...il.com, davem@...emloft.net,
        bcm-kernel-feedback-list@...adcom.com,
        linux-kernel@...r.kernel.org, wahrenst@....net,
        hkallweit1@...il.com
Subject: Re: [PATCH 2/6] net: bcmgenet: refactor phy mode configuration

Hi,

On 2/2/20 9:24 PM, Florian Fainelli wrote:
> 
> 
> On 2/2/2020 5:17 PM, Andrew Lunn wrote:
>> On Sat, Feb 01, 2020 at 08:24:14AM -0800, Florian Fainelli wrote:
>>>
>>>
>>> On 1/31/2020 11:46 PM, Jeremy Linton wrote:
>>>> The DT phy mode is similar to what we want for ACPI
>>>> lets factor it out of the of path, and change the
>>>> of_ call to device_. Further if the phy-mode property
>>>> cannot be found instead of failing the driver load lets
>>>> just default it to RGMII.
>>>
>>> Humm no please do not provide a fallback, if we cannot find a valid
>>> 'phy-mode' property we error out. This controller can be used with a
>>> variety of configurations (internal EPHY/GPHY, MoCA, external
>>> MII/Reverse MII/RGMII) and from a support perspective it is much easier
>>> for us if the driver errors out if one of those essential properties are
>>> omitted.
>>
>> Hi Florian
>>
>> Does any of the silicon variants have two or more MACs sharing one
>> MDIO bus? I'm thinking about the next patch in the series.
> 
> Have not come across a customer doing that, but the hardware
> definitively permits it, and so does the top-level chip pinmuxing.
> 

Does the genet driver?

I might be missing something in the driver, but it looks like the whole 
thing is 1:1:1:1 with platform dev:mdio:phy:netdev at the moment. Given 
the way bcmgenet_mii_register is throwing a bcmgenet MII bus for every 
device _probe().