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Message-ID: <20200217153032.GF31084@lunn.ch>
Date: Mon, 17 Feb 2020 16:30:32 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Vladimir Oltean <olteanv@...il.com>
Cc: shawnguo@...nel.org, robh+dt@...nel.org, mark.rutland@....com,
devicetree@...r.kernel.org, vivien.didelot@...il.com,
f.fainelli@...il.com, davem@...emloft.net, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org,
Claudiu Manoil <claudiu.manoil@....com>
Subject: Re: [PATCH devicetree 4/4] arm64: dts: fsl: ls1028a: enable switch
PHYs on RDB
On Mon, Feb 17, 2020 at 04:44:14PM +0200, Vladimir Oltean wrote:
> From: Claudiu Manoil <claudiu.manoil@....com>
>
> Link the switch PHY nodes to the central MDIO controller PCIe endpoint
> node on LS1028A (implemented as PF3) so that PHYs are accessible via
> MDIO.
>
> Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514
> quad PHY is capable of in-band-status.
>
> The PHYs are used in poll mode due to an issue with the interrupt line
> on current revisions of the LS1028A-RDB board.
>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@....com>
> Signed-off-by: Alex Marginean <alexandru.marginean@....com>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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