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Message-Id: <20200220.150051.2170993471455503146.davem@davemloft.net>
Date: Thu, 20 Feb 2020 15:00:51 -0800 (PST)
From: David Miller <davem@...emloft.net>
To: alexandre.belloni@...tlin.com
Cc: nicolas.ferre@...rochip.com, linux@...linux.org.uk,
antoine.tenart@...tlin.com, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH net v2] net: macb: Properly handle phylink on at91rm9200
From: Alexandre Belloni <alexandre.belloni@...tlin.com>
Date: Wed, 19 Feb 2020 15:15:51 +0100
> at91ether_init was handling the phy mode and speed but since the switch to
> phylink, the NCFGR register got overwritten by macb_mac_config(). The issue
> is that the RM9200_RMII bit and the MACB_CLK_DIV32 field are cleared
> but never restored as they conflict with the PAE, GBE and PCSSEL bits.
>
> Add new capability to differentiate between EMAC and the other versions of
> the IP and use it to set and avoid clearing the relevant bits.
>
> Also, this fixes a NULL pointer dereference in macb_mac_link_up as the EMAC
> doesn't use any rings/bufffers/queues.
>
> Fixes: 7897b071ac3b ("net: macb: convert to phylink")
> Signed-off-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
Applied and queued up for -stable, thanks.
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