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Message-Id: <20200229012426.30981-1-rohitm@chelsio.com>
Date: Sat, 29 Feb 2020 06:54:20 +0530
From: Rohit Maheshwari <rohitm@...lsio.com>
To: netdev@...r.kernel.org, davem@...emloft.net,
herbert@...dor.apana.org.au
Cc: secdev@...lsio.com, varun@...lsio.com, borisp@...lanox.com,
kuba@...nel.org, Rohit Maheshwari <rohitm@...lsio.com>
Subject: [PATCH net-next v3 0/6] cxgb4/chcr: ktls tx offload support on T6 adapter
This series of patches add support for kernel tls offload in Tx direction,
over Chelsio T6 NICs. SKBs marked as decrypted will be treated as tls plain
text packets and then offloaded to encrypt using network device (chelsio T6
adapter).
This series is broken down as follows:
Patch 1 defines a new macro and registers tls_dev_add and tls_dev_del
callbacks. When tls_dev_add gets called we send a connection request to
our hardware and to make HW understand about tls offload. Its a partial
connection setup and only ipv4 part is done.
Patch 2 handles the HW response of the connection request and then we
request to update TCB and handle it's HW response as well. Also we save
crypto key locally. Only supporting TLS_CIPHER_AES_GCM_128_KEY_SIZE.
Patch 3 handles tls marked skbs (decrypted bit set) and sends it to ULD for
crypto handling. This code has a minimal portion of tx handler, to handle
only one complete record per skb.
Patch 4 hanldes partial end part of records. Also added logic to handle
multiple records in one single skb. It also adds support to send out tcp
option(/s) if exists in skb. If a record is partial but has end part of a
record, we'll fetch complete record and then only send it to HW to generate
HASH on complete record.
Patch 5 handles partial first or middle part of record, it uses AES_CTR to
encrypt the partial record. If we are trying to send middle record, it's
start should be 16 byte aligned, so we'll fetch few earlier bytes from the
record and then send it to HW for encryption.
Patch 6 enables ipv6 support and also includes ktls startistics.
v1->v2:
- mark tcb state to close in tls_dev_del.
- u_ctx is now picked from adapter structure.
- clear atid in case of failure.
- corrected ULP_CRYPTO_KTLS_INLINE value.
- optimized tcb update using control queue.
- state machine handling when earlier states received.
- chcr_write_cpl_set_tcb_ulp function is shifted to patch3.
- un-necessary updating left variable.
v2->v3:
- add empty line after variable declaration.
- local variable declaration in reverse christmas tree ordering.
Rohit Maheshwari (6):
cxgb4/chcr : Register to tls add and del callback
cxgb4/chcr: Save tx keys and handle HW response
cxgb4/chcr: complete record tx handling
chcr: handle partial end part of a record
chcr: Handle first or middle part of record
cxgb4/chcr: Add ipv6 support and statistics
drivers/crypto/chelsio/Kconfig | 11 +
drivers/crypto/chelsio/Makefile | 3 +
drivers/crypto/chelsio/chcr_common.h | 135 ++
drivers/crypto/chelsio/chcr_core.c | 51 +-
drivers/crypto/chelsio/chcr_core.h | 7 +
drivers/crypto/chelsio/chcr_ktls.c | 2004 +++++++++++++++++
drivers/crypto/chelsio/chcr_ktls.h | 98 +
drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 +
.../ethernet/chelsio/cxgb4/cxgb4_debugfs.c | 25 +
.../net/ethernet/chelsio/cxgb4/cxgb4_uld.c | 32 +
.../net/ethernet/chelsio/cxgb4/cxgb4_uld.h | 13 +
drivers/net/ethernet/chelsio/cxgb4/l2t.c | 11 +
drivers/net/ethernet/chelsio/cxgb4/l2t.h | 1 +
drivers/net/ethernet/chelsio/cxgb4/sge.c | 6 +-
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 28 +
drivers/net/ethernet/chelsio/cxgb4/t4_tcb.h | 62 +-
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 2 +
17 files changed, 2470 insertions(+), 20 deletions(-)
create mode 100644 drivers/crypto/chelsio/chcr_common.h
create mode 100644 drivers/crypto/chelsio/chcr_ktls.c
create mode 100644 drivers/crypto/chelsio/chcr_ktls.h
--
2.25.0.191.gde93cc1
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