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Message-ID: <2fa00fef-7d11-d0b6-49a0-85a2b08a144d@intel.com>
Date: Mon, 2 Mar 2020 15:24:29 -0800
From: Jacob Keller <jacob.e.keller@...el.com>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: linux-pci@...r.kernel.org, netdev@...r.kernel.org,
Jeff Kirsher <jeffrey.t.kirsher@...el.com>,
QLogic-Storage-Upstream@...ium.com,
Michael Chan <michael.chan@...adcom.com>
Subject: Re: [PATCH 1/5] pci: introduce pci_get_dsn
On 3/2/2020 3:20 PM, Bjorn Helgaas wrote:
> On Mon, Mar 02, 2020 at 02:33:12PM -0800, Jacob Keller wrote:
>> On 3/2/2020 2:25 PM, Bjorn Helgaas wrote:
>
>>>> +int pci_get_dsn(struct pci_dev *dev, u8 dsn[])
>>>> +{
>>>> + u32 dword;
>>>> + int pos;
>>>> +
>>>> +
>>>> + pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DSN);
>>>> + if (!pos)
>>>> + return -EOPNOTSUPP;
>>>> +
>>>> + /*
>>>> + * The Device Serial Number is two dwords offset 4 bytes from the
>>>> + * capability position.
>>>> + */
>>>> + pos += 4;
>>>> + pci_read_config_dword(dev, pos, &dword);
>>>> + put_unaligned_le32(dword, &dsn[0]);
>>>> + pci_read_config_dword(dev, pos + 4, &dword);
>>>> + put_unaligned_le32(dword, &dsn[4]);
>>>
>>> Since the serial number is a 64-bit value, can we just return a u64
>>> and let the caller worry about any alignment and byte-order issues?
>>>
>>> This would be the only use of asm/unaligned.h in driver/pci, and I
>>> don't think DSN should be that special.
>>
>> I suppose that's fair, but it ends up leaving most callers having to fix
>> this immediately after calling this function.
>
> PCIe doesn't impose any structure on the value; it just says the first
> dword is the lower DW and the second is the upper DW. As long as we
> put that together correctly into a u64, I think further interpretation
> is caller-specific.
>
Makes sense. So basically, convert pci_get_dsn to a simply return a u64
instead of copying to an array, and then make callers assume that a
value of 0 is invalid?
Thanks,
Jake
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