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Date:   Mon,  2 Mar 2020 01:18:29 +0100
From:   Hauke Mehrtens <hauke@...ke-m.de>
To:     davem@...emloft.net, linux@...pel-privat.de
Cc:     netdev@...r.kernel.org, chris.snook@...il.com, jcliburn@...il.com,
        Hauke Mehrtens <hauke@...ke-m.de>
Subject: [PATCH 1/2] ag71xx: Add support for RMII, RGMII and SGMII

The GMAC0 on the AR9344 also supports RMII and RGMII. This is an
external interface which gets connected to an external PHY or an
external switch. Without this patch the driver does not load on PHYs
configured to RMII or RGMII.

The QCA9563 often uses SGMII to connect to external switches.

This still misses the external interface configuration, but that was
also not done before the switch to phylink.

Fixes: 892e09153fa3 ("net: ag71xx: port to phylink")
Signed-off-by: Hauke Mehrtens <hauke@...ke-m.de>
---
 drivers/net/ethernet/atheros/ag71xx.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/atheros/ag71xx.c b/drivers/net/ethernet/atheros/ag71xx.c
index 02b7705393ca..69125f870363 100644
--- a/drivers/net/ethernet/atheros/ag71xx.c
+++ b/drivers/net/ethernet/atheros/ag71xx.c
@@ -874,8 +874,11 @@ static void ag71xx_mac_validate(struct phylink_config *config,
 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 
 	if (state->interface != PHY_INTERFACE_MODE_NA &&
+	    state->interface != PHY_INTERFACE_MODE_MII &&
+	    state->interface != PHY_INTERFACE_MODE_RMII &&
 	    state->interface != PHY_INTERFACE_MODE_GMII &&
-	    state->interface != PHY_INTERFACE_MODE_MII) {
+	    state->interface != PHY_INTERFACE_MODE_SGMII &&
+	    phy_interface_mode_is_rgmii(state->interface)) {
 		bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
 		return;
 	}
@@ -889,7 +892,9 @@ static void ag71xx_mac_validate(struct phylink_config *config,
 	phylink_set(mask, 100baseT_Full);
 
 	if (state->interface == PHY_INTERFACE_MODE_NA ||
-	    state->interface == PHY_INTERFACE_MODE_GMII) {
+	    state->interface == PHY_INTERFACE_MODE_GMII ||
+	    state->interface == PHY_INTERFACE_MODE_SGMII ||
+	    phy_interface_mode_is_rgmii(state->interface)) {
 		phylink_set(mask, 1000baseT_Full);
 		phylink_set(mask, 1000baseX_Full);
 	}
-- 
2.20.1

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