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Date:   Fri, 6 Mar 2020 14:53:32 +0100
From:   Marek Behun <marek.behun@....cz>
To:     Russell King - ARM Linux admin <linux@...linux.org.uk>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        Vivien Didelot <vivien.didelot@...il.com>
Subject: Re: [PATCH net-next 0/10] net: dsa: improve serdes integration

On Fri, 6 Mar 2020 10:39:34 +0000
Russell King - ARM Linux admin <linux@...linux.org.uk> wrote:

> On Fri, Mar 06, 2020 at 04:57:20AM +0100, Andrew Lunn wrote:
> > Hi Russell
> >   
> > > I will try to figure out which patch broke it.  
> > 
> > ommit e67b45adefa8d43c68560906f3955845a5ee14d8 (HEAD)
> > Author: Russell King <rmk+kernel@...linux.org.uk>
> > Date:   Thu Mar 5 12:42:26 2020 +0000
> > 
> >     net: dsa: mv88e6xxx: configure interface settings in mac_config
> >     
> >     Only configure the interface settings in mac_config(), leaving the
> >     speed and duplex settings to mac_link_up to deal with.
> > 
> > Maybe:
> > 
> > 
> > +       /* FIXME: should we force the link down here - but if we do, how
> > +        * do we restore the link force/unforce state? The driver layering
> > +        * gets in the way.
> > +        */
> > 
> > ???  
> 
> That's a possibility.  Is the MAC already configured for the interface
> mode though?
> 
> The problem occurs because the CPU and DSA ports are forced up during
> DSA initialisation, but phylink expects the link to initially be down.
> So, one may think that simply forcing the link down here to work around
> that would be a solution.
> 
> Unfortunately, that means that CPU and DSA ports without a fixed-link
> spec will stay down because phylink won't call mac_link_up() - so we're
> back to the poor integration of phylink for CPU and DSA ports problem.
> Even if phylink /were/ to call mac_link_up() for that situation,
> phylink has no information on the speed and duplex for such a port, so
> speed and duplex would be nonsense.
> 
> That conversion is very problematical.
> 
> I do have some patches that solve it by changing phylink, but it's
> quite a hack - the problem is detecting the uninitialised state in
> phylink_start(), which is really quite late.  You can find them in my
> "zii" branch:
> 
> net: dsa: mv88e6xxx: split out SPEED_MAX setting
> net: phylink/dsa: fix DSA and CPU links
> 
> So, I think we're back to... what do we do about the broken phylink
> integration for CPU and DSA ports.
> 

What I have been wondering about is if it would make sense to have the
ability to set CPU/DSA link settings from userspace. Currently the
CPU and DSA ports do not correspond to any system interface, so this is
impossible via ethtool. I have been thinking about how this could be
done.

What I don't like about current implementation is that it is impossible
to query the DSA ports from userspace.

For example in a configuration when eth0 is connected to port 5 on
Topaz, and ports 1-4 are lan1 - lan4, when I query statistics via
ethtool, on interfaces lanN I get staticstics for the swithc ports 1-4.
On interface eth0 the driver passes stats from the network interface on
the SOC and also stats from switch port 5.

But when there are two switches cascaded, there is currently no way to
query for stats on their DSA ports.

Sure, it could be solved by adding DSA ports into
dsa_master_get_ethtool_stats. But if DSA ports somehow could be queried
via ethtool, this problem could be solved.

Marek

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