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Message-ID: <DB8PR04MB682817485CBD1EFA1AA179F1E0CF0@DB8PR04MB6828.eurprd04.prod.outlook.com>
Date: Thu, 26 Mar 2020 21:26:46 +0000
From: Ioana Ciornei <ioana.ciornei@....com>
To: Russell King - ARM Linux admin <linux@...linux.org.uk>
CC: Andrew Lunn <andrew@...n.ch>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Mark Rutland <mark.rutland@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
Leo Li <leoyang.li@....com>, Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: RE: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
> Subject: Re: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
>
> On Thu, Mar 26, 2020 at 09:14:13PM +0000, Ioana Ciornei wrote:
> > > Subject: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
> > >
> > > *NOT FOR MERGING*
> > >
> > > Add PCS MDIO nodes for the LX2160A, which will be used when the MAC
> > > is in PHY mode and is using in-band negotiation.
> > >
> > > Signed-off-by: Russell King <rmk+kernel@...linux.org.uk>
> > > ---
> > > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 144
> > > ++++++++++++++++++
> > > 1 file changed, 144 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > index e5ee5591e52b..732af33eec18 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > @@ -960,6 +960,132 @@
> > > status = "disabled";
> > > };
> > >
> > > + pcs_mdio1: mdio@...7000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c07000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> >
> > Are the PCS MDIO buses shareable? I am asking this because in case of QSGMII
> our structure is a little bit quirky.
> > There are 4 MACs but all PCSs sit on the first MACs internal MDIO bus only. The
> other 3 internal MDIO buses are empty.
>
> I haven't looked at QSGMII yet, I've only considered single-lane setups and only
> implemented that. For _this_ part, it doesn't matter as this is just declaring
> where the hardware is. I think that matters more for the dpmac nodes.
Sorry for misplacing the comment.
I am going to take a look tomorrow and see how workable this approach is going to be in the long term since I have a board with QSGMII handy.
>
> > > +
> > > + pcs_mdio2: mdio@...b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c0b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio3: mdio@...f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c0f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio4: mdio@...3000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c13000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio5: mdio@...7000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c17000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio6: mdio@...b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c1b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio7: mdio@...f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c1f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio8: mdio@...3000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c23000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio9: mdio@...7000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c27000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio10: mdio@...b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c2b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio11: mdio@...f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c2f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio12: mdio@...3000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c33000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio13: mdio@...7000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c37000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio14: mdio@...b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c3b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio15: mdio@...f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c3f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio16: mdio@...3000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c43000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio17: mdio@...7000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c47000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio18: mdio@...b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c4b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> >
> > Please sort the nodes alphabetically.
>
> Huh? The nodes in this file are already sorted according to address, and this
> patch preserves that sorting. The hex address field also happens to be
> alphabetical.
>
> Or do you mean the label for these modes - I've never heard of sorting by label
> for a SoC file.
Uhh, I remember now. For some reason I thought this was a board file.
Ioana
[snip]
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