[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200327135928.344e45b6@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com>
Date: Fri, 27 Mar 2020 13:59:28 -0700
From: Jakub Kicinski <kuba@...nel.org>
To: "Samudrala, Sridhar" <sridhar.samudrala@...el.com>
Cc: Saeed Mahameed <saeedm@...lanox.com>,
Aya Levin <ayal@...lanox.com>,
"andrew.gospodarek@...adcom.com" <andrew.gospodarek@...adcom.com>,
"sburla@...vell.com" <sburla@...vell.com>,
"jiri@...nulli.us" <jiri@...nulli.us>,
Tariq Toukan <tariqt@...lanox.com>,
"davem@...emloft.net" <davem@...emloft.net>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
Vlad Buslov <vladbu@...lanox.com>,
"lihong.yang@...el.com" <lihong.yang@...el.com>,
Ido Schimmel <idosch@...lanox.com>,
"jgg@...pe.ca" <jgg@...pe.ca>,
"fmanlunas@...vell.com" <fmanlunas@...vell.com>,
"oss-drivers@...ronome.com" <oss-drivers@...ronome.com>,
"leon@...nel.org" <leon@...nel.org>,
Parav Pandit <parav@...lanox.com>,
"grygorii.strashko@...com" <grygorii.strashko@...com>,
"michael.chan@...adcom.com" <michael.chan@...adcom.com>,
Alex Vesker <valex@...lanox.com>,
"snelson@...sando.io" <snelson@...sando.io>,
"linyunsheng@...wei.com" <linyunsheng@...wei.com>,
"magnus.karlsson@...el.com" <magnus.karlsson@...el.com>,
"dchickles@...vell.com" <dchickles@...vell.com>,
"jacob.e.keller@...el.com" <jacob.e.keller@...el.com>,
Moshe Shemesh <moshe@...lanox.com>,
Mark Zhang <markz@...lanox.com>,
"aelior@...vell.com" <aelior@...vell.com>,
Yuval Avnery <yuvalav@...lanox.com>,
"drivers@...sando.io" <drivers@...sando.io>,
mlxsw <mlxsw@...lanox.com>,
"GR-everest-linux-l2@...vell.com" <GR-everest-linux-l2@...vell.com>,
Yevgeny Kliteynik <kliteyn@...lanox.com>,
"vikas.gupta@...adcom.com" <vikas.gupta@...adcom.com>,
Eran Ben Elisha <eranbe@...lanox.com>
Subject: Re: [RFC] current devlink extension plan for NICs
On Fri, 27 Mar 2020 13:47:44 -0700 Samudrala, Sridhar wrote:
> >> But the sub-functions are just a subset of slices, PF and VFs also
> >> have a slice associated with them.. And all those things have a port,
> >> too.
> >>
> >
> > PFs/VFs, might have more than one port sometimes ..
>
> Yes. When the uplink ports are in a LAG, then a PF/VF/slice should be
> able to send or receive from more than 1 port.
So that's a little simpler to what I was considering, in mlx4 and older
nfps we have 1 PCI PF for multi-port devices. There is only one PF with
multiple BAR regions corresponding to different device ports.
So you can still address fully independently the pipelines for two
ports, but they are "mapped" in the same PCI PF.
Powered by blists - more mailing lists