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Date: Tue, 31 Mar 2020 12:11:09 +0800 From: Yangbo Lu <yangbo.lu@....com> To: linux-kernel@...r.kernel.org, netdev@...r.kernel.org Cc: Yangbo Lu <yangbo.lu@....com>, "David S . Miller" <davem@...emloft.net>, Richard Cochran <richardcochran@...il.com>, Vladimir Oltean <vladimir.oltean@....com>, Claudiu Manoil <claudiu.manoil@....com>, Andrew Lunn <andrew@...n.ch>, Vivien Didelot <vivien.didelot@...il.com>, Florian Fainelli <f.fainelli@...il.com>, Alexandre Belloni <alexandre.belloni@...tlin.com>, Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com> Subject: [v2, 3/7] net: mscc: ocelot: redefine PTP pins There are 5 PTP_PINS register groups on Ocelot switch. Except the one used for TOD operations, there are still 4 register groups for programmable pins. So redefine the 4 programmable pins. Signed-off-by: Yangbo Lu <yangbo.lu@....com> --- Changes for v2: - None. --- include/soc/mscc/ocelot.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h index fe301794..a588b6372 100644 --- a/include/soc/mscc/ocelot.h +++ b/include/soc/mscc/ocelot.h @@ -440,10 +440,11 @@ enum ocelot_regfield { REGFIELD_MAX }; -enum ocelot_clk_pins { - ALT_PPS_PIN = 1, - EXT_CLK_PIN, - ALT_LDST_PIN, +enum ocelot_ptp_pins { + PTP_PIN_0, + PTP_PIN_1, + PTP_PIN_2, + PTP_PIN_3, TOD_ACC_PIN }; -- 2.7.4
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