netdev - [PATCH 2/2] net: stmmac: Fix sub-second increment

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Message-Id: <20200414091003.7629-2-julien.beraud@orolia.com>
Date:   Tue, 14 Apr 2020 11:10:03 +0200
From:   Julien Beraud <julien.beraud@...lia.com>
To:     Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Jose Abreu <joabreu@...opsys.com>,
        "David S . Miller" <davem@...emloft.net>
Cc:     netdev@...r.kernel.org, Julien Beraud <julien.beraud@...lia.com>
Subject: [PATCH 2/2] net: stmmac: Fix sub-second increment

In fine adjustement mode, which is the current default, the sub-second
increment register is the number of nanoseconds that wil be added to the
clock when the accumulator overflows. At each clock cycle, the value of
the addend register is added to the accumulator.
Currently, we use 20ns = 1e09ns / 50MHz as this value whatever the
frequency of the ptp clock actually is.
The adjustment is then done on the addend register, only incrementing
every X clock cycles X being the ratio between 50MHz and ptp_clock_rate
(addend = 2^31 * 50MHz/ptp_clock_rate).
First of all there is a bug that was already solved in the past in that
it should be 40ns = 2e09ns / 50MHz - (the accumulator can only overflow
once every 2 additions)
Even with this issue fixed, this has following consequences :
- The resolution of the timestamping clock is limited to 40ns while it
  is not needed, thus limiting the accuracy of the timestamping to 40ns.
- In case the frequency of the ptp clock is inferior to 50MHz, the
  addend value will be set to 0 and the clock will simply not work.

Fix this by setting sub-second increment to 2e09ns / ptp_clock_rate and
setting the default value of addend to mid-range = 2^31. By doing this
we can reach the best possible resolution in the timestamps, only
incrementing the clock by the minimum possible value. This will also
work for frequencies below 50MHz (for instance using the internal osc1
clock at 25MHz for socfpga platforms).

Signed-off-by: Julien Beraud <julien.beraud@...lia.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 10 ++++++----
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c     | 11 ++---------
 2 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
index fcf080243a0f..2438c7bbc7c9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
@@ -27,12 +27,14 @@ static void config_sub_second_increment(void __iomem *ioaddr,
 	unsigned long data;
 	u32 reg_value;
 
-	/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
-	 *	formula = (1/ptp_clock) * 1000000000
-	 * where ptp_clock is 50MHz if fine method is used to update system
+	/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
+	 * increment to twice the number of nanoseconds of a clock cycle.
+	 * Setting the default addend value to mid range will make the
+	 * accumulator overflow once every 2 clock cycles, thus adding twice
+	 * the length of a clock cycle to the clock time.
 	 */
 	if (value & PTP_TCR_TSCFUPDT)
-		data = (1000000000ULL / 50000000);
+		data = (2000000000ULL / ptp_clock);
 	else
 		data = (1000000000ULL / ptp_clock);
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index e6898fd5223f..4ceddfa64b1d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -511,7 +511,6 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
 	struct stmmac_priv *priv = netdev_priv(dev);
 	struct hwtstamp_config config;
 	struct timespec64 now;
-	u64 temp = 0;
 	u32 ptp_v2 = 0;
 	u32 tstamp_all = 0;
 	u32 ptp_over_ipv4_udp = 0;
@@ -698,19 +697,13 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
 		stmmac_config_sub_second_increment(priv,
 				priv->ptpaddr, priv->plat->clk_ptp_rate,
 				xmac, &sec_inc);
-		temp = div_u64(1000000000ULL, sec_inc);
 
 		/* Store sub second increment and flags for later use */
 		priv->sub_second_inc = sec_inc;
 		priv->systime_flags = value;
 
-		/* calculate default added value:
-		 * formula is :
-		 * addend = (2^32)/freq_div_ratio;
-		 * where, freq_div_ratio = 1e9ns/sec_inc
-		 */
-		temp = (u64)(temp << 32);
-		priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);
+		/* set default addend to mid-range */
+		priv->default_addend = (1 << 31);
 		stmmac_config_addend(priv, priv->ptpaddr, priv->default_addend);
 
 		/* initialize system time */
-- 
2.25.1