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Date:   Thu, 23 Apr 2020 14:41:58 +0100
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Baruch Siach <baruch@...s.co.il>
Cc:     netdev@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>
Subject: Re: [PATCH net v3 2/2] net: phy: marvell10g: hwmon support for 2110

On Thu, Apr 23, 2020 at 02:39:36PM +0100, Russell King - ARM Linux admin wrote:
> On Thu, Apr 23, 2020 at 08:08:02AM +0300, Baruch Siach wrote:
> > Read the temperature sensor register from the correct location for the
> > 88E2110 PHY. There is no enable/disable bit, so leave
> > mv3310_hwmon_config() for 88X3310 only.
> > 
> > Signed-off-by: Baruch Siach <baruch@...s.co.il>
> > ---
> > v3: Split temperature register read routine per variant (Andrew Lunn)
> > 
> > v2: Fix indentation (Andrew Lunn)
> > ---
> >  drivers/net/phy/marvell10g.c | 25 +++++++++++++++++++++++--
> >  1 file changed, 23 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
> > index 69530a84450f..e14b9c2e5efe 100644
> > --- a/drivers/net/phy/marvell10g.c
> > +++ b/drivers/net/phy/marvell10g.c
> > @@ -66,6 +66,8 @@ enum {
> >  	MV_PCS_CSSR1_SPD2_2500	= 0x0004,
> >  	MV_PCS_CSSR1_SPD2_10000	= 0x0000,
> >  
> > +	MV_PCS_TEMP		= 0x8042,
> 
> Please add a comment mentioning that this is for the 88E2110, and
> it would probably be a good idea to document the MV_V2_TEMP definition
> as 88X3310 specific as well.
> 
> > +
> >  	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control
> >  	 * registers appear to set themselves to the 0x800X when AN is
> >  	 * restarted, but status registers appear readable from either.
> > @@ -104,6 +106,24 @@ static umode_t mv3310_hwmon_is_visible(const void *data,
> >  	return 0;
> >  }
> >  
> > +static int mv3310_hwmon_read_temp_reg(struct phy_device *phydev)
> > +{
> > +	return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
> > +}
> > +
> > +static int mv2110_hwmon_read_temp_reg(struct phy_device *phydev)
> > +{
> > +	return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP);
> > +}
> > +
> > +static int mv10g_hwmon_read_temp_reg(struct phy_device *phydev)
> > +{
> > +	if (phydev->drv->phy_id == MARVELL_PHY_ID_88X3310)
> > +		return mv3310_hwmon_read_temp_reg(phydev);
> > +	else /* MARVELL_PHY_ID_88E2110 */
> > +		return mv2110_hwmon_read_temp_reg(phydev);
> > +}
> > +
> >  static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
> >  			     u32 attr, int channel, long *value)
> >  {
> > @@ -116,7 +136,7 @@ static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
> >  	}
> >  
> >  	if (type == hwmon_temp && attr == hwmon_temp_input) {
> > -		temp = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
> > +		temp = mv10g_hwmon_read_temp_reg(phydev);
> >  		if (temp < 0)
> >  			return temp;
> >  
> > @@ -196,7 +216,8 @@ static int mv3310_hwmon_probe(struct phy_device *phydev)
> >  	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
> >  	int i, j, ret;
> >  
> > -	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310)
> > +	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 &&
> > +	    phydev->drv->phy_id != MARVELL_PHY_ID_88E2110)
> >  		return 0;
> 
> Doesn't that mean this condition can be removed, as this can only be
> reached when one of those conditions is true?

Thinking about this more, I think it may make sense to either reverse
the order of this patch series, or even better combine the two patches
into a single patch.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up

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