netdev - Re: [PATCH net-next v2 3/9] net: phy: add kr phy connection type

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20200424134236.GB1087366@lunn.ch>
Date:   Fri, 24 Apr 2020 15:42:36 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Florinel Iordache <florinel.iordache@....com>
Cc:     davem@...emloft.net, netdev@...r.kernel.org, f.fainelli@...il.com,
        hkallweit1@...il.com, linux@...linux.org.uk,
        devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
        robh+dt@...nel.org, mark.rutland@....com, kuba@...nel.org,
        corbet@....net, shawnguo@...nel.org, leoyang.li@....com,
        madalin.bucur@....nxp.com, ioana.ciornei@....com,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v2 3/9] net: phy: add kr phy connection type

On Fri, Apr 24, 2020 at 03:46:25PM +0300, Florinel Iordache wrote:
> Add support for backplane kr phy connection types currently available
> (10gbase-kr, 40gbase-kr4) and the required phylink updates (cover all
> the cases for KR modes which are clause 45 compatible to correctly assign
> phy_interface and phylink#supported)
> 
> Signed-off-by: Florinel Iordache <florinel.iordache@....com>
> ---
>  drivers/net/phy/phylink.c | 15 ++++++++++++---
>  include/linux/phy.h       |  6 +++++-
>  2 files changed, 17 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> index 34ca12a..9a31f68 100644
> --- a/drivers/net/phy/phylink.c
> +++ b/drivers/net/phy/phylink.c
> @@ -4,6 +4,7 @@
>   * technologies such as SFP cages where the PHY is hot-pluggable.
>   *
>   * Copyright (C) 2015 Russell King
> + * Copyright 2020 NXP
>   */
>  #include <linux/ethtool.h>
>  #include <linux/export.h>
> @@ -304,7 +305,6 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
>  			break;
>  
>  		case PHY_INTERFACE_MODE_USXGMII:
> -		case PHY_INTERFACE_MODE_10GKR:
>  		case PHY_INTERFACE_MODE_10GBASER:
>  			phylink_set(pl->supported, 10baseT_Half);
>  			phylink_set(pl->supported, 10baseT_Full);

Hi Florinel

What about the issues pointed out in:

https://www.spinics.net/lists/netdev/msg641046.html

	Andrew