netdev - Re: [PATCH net v4] net: phy: marvell10g: fix temperature sensor on 2110

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20200426131036.GA25745@shell.armlinux.org.uk>
Date:   Sun, 26 Apr 2020 14:10:37 +0100
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Baruch Siach <baruch@...s.co.il>
Cc:     netdev@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Maxime Chevallier <maxime.chevallier@...tlin.com>
Subject: Re: [PATCH net v4] net: phy: marvell10g: fix temperature sensor on
 2110

On Sun, Apr 26, 2020 at 09:22:06AM +0300, Baruch Siach wrote:
> Read the temperature sensor register from the correct location for the
> 88E2110 PHY. There is no enable/disable bit on 2110, so make
> mv3310_hwmon_config() run on 88X3310 only.
> 
> Fixes: 62d01535474b61 ("net: phy: marvell10g: add support for the 88x2110 PHY")
> Cc: Maxime Chevallier <maxime.chevallier@...tlin.com>
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
> Signed-off-by: Baruch Siach <baruch@...s.co.il>

Reviewed-by: Russell King <rmk+kernel@...linux.org.uk>

Thanks.

> ---
> v4:
>   * Combine two patches into one (RMK)
> 
>   * Add comments to mark PHY specific temperature registers (RMK)
> 
>   * Drop PHY check on mv3310_hwmon_probe() (RMK)
> 
> v3: Split temperature register read routine per variant (Andrew Lunn)
> 
> v2: Fix indentation (Andrew Lunn)
> ---
>  drivers/net/phy/marvell10g.c | 27 ++++++++++++++++++++++++++-
>  1 file changed, 26 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
> index 95e3f4644aeb..419301bfe8c6 100644
> --- a/drivers/net/phy/marvell10g.c
> +++ b/drivers/net/phy/marvell10g.c
> @@ -66,6 +66,9 @@ enum {
>  	MV_PCS_CSSR1_SPD2_2500	= 0x0004,
>  	MV_PCS_CSSR1_SPD2_10000	= 0x0000,
>  
> +	/* Temperature read register (88E2110 only) */
> +	MV_PCS_TEMP		= 0x8042,
> +
>  	/* These registers appear at 0x800X and 0xa00X - the 0xa00X control
>  	 * registers appear to set themselves to the 0x800X when AN is
>  	 * restarted, but status registers appear readable from either.
> @@ -77,6 +80,7 @@ enum {
>  	MV_V2_PORT_CTRL		= 0xf001,
>  	MV_V2_PORT_CTRL_SWRST	= BIT(15),
>  	MV_V2_PORT_CTRL_PWRDOWN = BIT(11),
> +	/* Temperature control/read registers (88X3310 only) */
>  	MV_V2_TEMP_CTRL		= 0xf08a,
>  	MV_V2_TEMP_CTRL_MASK	= 0xc000,
>  	MV_V2_TEMP_CTRL_SAMPLE	= 0x0000,
> @@ -104,6 +108,24 @@ static umode_t mv3310_hwmon_is_visible(const void *data,
>  	return 0;
>  }
>  
> +static int mv3310_hwmon_read_temp_reg(struct phy_device *phydev)
> +{
> +	return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
> +}
> +
> +static int mv2110_hwmon_read_temp_reg(struct phy_device *phydev)
> +{
> +	return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP);
> +}
> +
> +static int mv10g_hwmon_read_temp_reg(struct phy_device *phydev)
> +{
> +	if (phydev->drv->phy_id == MARVELL_PHY_ID_88X3310)
> +		return mv3310_hwmon_read_temp_reg(phydev);
> +	else /* MARVELL_PHY_ID_88E2110 */
> +		return mv2110_hwmon_read_temp_reg(phydev);
> +}
> +
>  static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
>  			     u32 attr, int channel, long *value)
>  {
> @@ -116,7 +138,7 @@ static int mv3310_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
>  	}
>  
>  	if (type == hwmon_temp && attr == hwmon_temp_input) {
> -		temp = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP);
> +		temp = mv10g_hwmon_read_temp_reg(phydev);
>  		if (temp < 0)
>  			return temp;
>  
> @@ -169,6 +191,9 @@ static int mv3310_hwmon_config(struct phy_device *phydev, bool enable)
>  	u16 val;
>  	int ret;
>  
> +	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310)
> +		return 0;
> +
>  	ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP,
>  			    MV_V2_TEMP_UNKNOWN);
>  	if (ret < 0)
> -- 
> 2.26.2
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up