[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200428212311.GD30459@lunn.ch>
Date: Tue, 28 Apr 2020 23:23:11 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Michael Walle <michael@...le.cc>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
"David S . Miller" <davem@...emloft.net>
Subject: Re: [PATCH net-next 3/4] net: phy: bcm54140: apply the workaround on
b0 chips
On Tue, Apr 28, 2020 at 11:08:53PM +0200, Michael Walle wrote:
> The lower three bits of the phy_id specifies the chip stepping. The
> workaround is specifically for the B0 stepping. Apply it only on these
> chips.
>
> Signed-off-by: Michael Walle <michael@...le.cc>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
Powered by blists - more mailing lists