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Date:   Tue, 28 Apr 2020 18:54:22 -0700
From:   Matthew Wilcox <willy@...radead.org>
To:     "Kirill A. Shutemov" <kirill@...temov.name>
Cc:     Jesper Dangaard Brouer <brouer@...hat.com>, netdev@...r.kernel.org,
        linux-mm@...ck.org,
        Toke Høiland-Jørgensen <toke@...e.dk>,
        Ilias Apalodimas <ilias.apalodimas@...aro.org>,
        Saeed Mahameed <saeedm@...lanox.com>,
        Alexander Duyck <alexander.duyck@...il.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        mgorman@...hsingularity.net,
        "David S. Miller" <davem@...emloft.net>,
        Tariq Toukan <tariqt@...lanox.com>
Subject: Re: [net-next PATCH V3 1/3] mm: add dma_addr_t to struct page

On Wed, Apr 29, 2020 at 03:38:43AM +0300, Kirill A. Shutemov wrote:
> On Wed, Feb 13, 2019 at 02:55:40AM +0100, Jesper Dangaard Brouer wrote:
> > The page_pool API is using page->private to store DMA addresses.
> > As pointed out by David Miller we can't use that on 32-bit architectures
> > with 64-bit DMA
> > +		struct {	/* page_pool used by netstack */
> > +			/**
> > +			 * @dma_addr: might require a 64-bit value even on
> > +			 * 32-bit architectures.
> > +			 */
> > +			dma_addr_t dma_addr;
> > +		};
> 
> [ I'm slow, but I've just noticed this change into struct page. ]
> 
> Is there a change that the dma_addr would have bit 0 set? If yes it may
> lead to false-positive PageTail() and really strange behaviour.

No.  It's the DMA address of the page, so it's going to be page aligned
and have the bottom 12 (or so) bits cleared.  It's not feasible for some
wacky IOMMU to use the bottom N bits for its own purposes because you can,
say, add three to the DMA address of the page and expect the device to
DMA to the third byte within the page.

Wacky IOMMUs use the top bits for storing "interesting" information.

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