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Message-ID: <HE1PR0402MB2745BA1122387B49F589794CFFAA0@HE1PR0402MB2745.eurprd04.prod.outlook.com>
Date: Thu, 30 Apr 2020 02:44:48 +0000
From: Andy Duan <fugang.duan@....com>
To: Andrew Lunn <andrew@...n.ch>, David Miller <davem@...emloft.net>
CC: netdev <netdev@...r.kernel.org>, Chris Healy <cphealy@...il.com>
Subject: RE: [EXT] [PATCH net-next v2] net: ethernet: fec: Prevent MII event
after MII_SPEED write
From: Andrew Lunn <andrew@...n.ch> Sent: Thursday, April 30, 2020 4:53 AM
> The change to polled IO for MDIO completion assumes that MII events are
> only generated for MDIO transactions. However on some SoCs writing to the
> MII_SPEED register can also trigger an MII event. As a result, the next MDIO
> read has a pending MII event, and immediately reads the data registers
> before it contains useful data. When the read does complete, another MII
> event is posted, which results in the next read also going wrong, and the cycle
> continues.
>
> By writing 0 to the MII_DATA register before writing to the speed register, this
> MII event for the MII_SPEED is suppressed, and polled IO works as expected.
>
> v2 - Only infec_enet_mii_init()
>
> Fixes: 29ae6bd1b0d8 ("net: ethernet: fec: Replace interrupt driven MDIO with
> polled IO")
> Reported-by: Andy Duan <fugang.duan@....com>
> Suggested-by: Andy Duan <fugang.duan@....com>
> Signed-off-by: Andrew Lunn <andrew@...n.ch>
Acked-by: Fugang Duan <fugang.duan@....com>
> ---
> drivers/net/ethernet/freescale/fec_main.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/ethernet/freescale/fec_main.c
> b/drivers/net/ethernet/freescale/fec_main.c
> index 1ae075a246a3..2e209142f2d1 100644
> --- a/drivers/net/ethernet/freescale/fec_main.c
> +++ b/drivers/net/ethernet/freescale/fec_main.c
> @@ -2142,6 +2142,16 @@ static int fec_enet_mii_init(struct
> platform_device *pdev)
> if (suppress_preamble)
> fep->phy_speed |= BIT(7);
>
> + /* Clear MMFR to avoid to generate MII event by writing MSCR.
> + * MII event generation condition:
> + * - writing MSCR:
> + * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero &
> + * mscr_reg_data_in[7:0] != 0
> + * - writing MMFR:
> + * - mscr[7:0]_not_zero
> + */
> + writel(0, fep->hwp + FEC_MII_DATA);
> +
> writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>
> /* Clear any pending transaction complete indication */
> --
> 2.26.1
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