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Message-ID: <6cb4dbe3-ae7f-ef56-39d9-149a2802832a@gmail.com>
Date: Fri, 8 May 2020 23:31:46 +0200
From: Heiner Kallweit <hkallweit1@...il.com>
To: Realtek linux nic maintainers <nic_swsd@...ltek.com>,
David Miller <davem@...emloft.net>
Cc: "netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: [PATCH net-next 3/4] r8169: add helper rtl_wait_txrx_fifo_empty
Add a helper for waiting for FIFO's to be empty, again the name is
borrowed from the vendor driver.
Signed-off-by: Heiner Kallweit <hkallweit1@...il.com>
---
drivers/net/ethernet/realtek/r8169_main.c | 35 ++++++++++++++---------
1 file changed, 21 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index eb26c3477..7ea58bd9b 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
@@ -2496,10 +2496,31 @@ DECLARE_RTL_COND(rtl_txcfg_empty_cond)
return RTL_R32(tp, TxConfig) & TXCFG_EMPTY;
}
+DECLARE_RTL_COND(rtl_rxtx_empty_cond)
+{
+ return (RTL_R8(tp, MCU) & RXTX_EMPTY) == RXTX_EMPTY;
+}
+
+static void rtl_wait_txrx_fifo_empty(struct rtl8169_private *tp)
+{
+ switch (tp->mac_version) {
+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_52:
+ rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42);
+ rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
+ break;
+ case RTL_GIGA_MAC_VER_60 ... RTL_GIGA_MAC_VER_61:
+ rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
+ break;
+ default:
+ break;
+ }
+}
+
static void rtl_enable_rxdvgate(struct rtl8169_private *tp)
{
RTL_W32(tp, MISC, RTL_R32(tp, MISC) | RXDV_GATED_EN);
fsleep(2000);
+ rtl_wait_txrx_fifo_empty(tp);
}
static void rtl8169_hw_reset(struct rtl8169_private *tp)
@@ -5068,11 +5089,6 @@ static void r8168g_wait_ll_share_fifo_ready(struct rtl8169_private *tp)
rtl_loop_wait_high(tp, &rtl_link_list_ready_cond, 100, 42);
}
-DECLARE_RTL_COND(rtl_rxtx_empty_cond)
-{
- return (RTL_R8(tp, MCU) & RXTX_EMPTY) == RXTX_EMPTY;
-}
-
static int r8169_mdio_read_reg(struct mii_bus *mii_bus, int phyaddr, int phyreg)
{
struct rtl8169_private *tp = mii_bus->priv;
@@ -5141,12 +5157,6 @@ static void rtl_hw_init_8168g(struct rtl8169_private *tp)
{
rtl_enable_rxdvgate(tp);
- if (!rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42))
- return;
-
- if (!rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42))
- return;
-
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) & ~(CmdTxEnb | CmdRxEnb));
msleep(1);
RTL_W8(tp, MCU, RTL_R8(tp, MCU) & ~NOW_IS_OOB);
@@ -5162,9 +5172,6 @@ static void rtl_hw_init_8125(struct rtl8169_private *tp)
{
rtl_enable_rxdvgate(tp);
- if (!rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42))
- return;
-
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) & ~(CmdTxEnb | CmdRxEnb));
msleep(1);
RTL_W8(tp, MCU, RTL_R8(tp, MCU) & ~NOW_IS_OOB);
--
2.26.2
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