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Message-ID: <20200509165742.GD362499@lunn.ch>
Date: Sat, 9 May 2020 18:57:42 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Michael Grzeschik <m.grzeschik@...gutronix.de>
Cc: netdev@...r.kernel.org, f.fainelli@...il.com, davem@...emloft.net,
kernel@...gutronix.de, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 2/5] dt-bindings: net: mdio-gpio: add compatible for
microchip,mdio-smi0
On Fri, May 08, 2020 at 05:43:40PM +0200, Michael Grzeschik wrote:
> Microchip SMI0 Mode is a special mode, where the MDIO Read/Write
> commands are part of the PHY Address and the OP Code is always 0. We add
> the compatible for this special mode of the bitbanged mdio driver.
>
> Cc: devicetree@...r.kernel.org
> Signed-off-by: Michael Grzeschik <m.grzeschik@...gutronix.de>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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