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Message-ID: <AM6PR0402MB3607541D33B1C61476022D0AFFB70@AM6PR0402MB3607.eurprd04.prod.outlook.com>
Date:   Thu, 21 May 2020 03:15:28 +0000
From:   Andy Duan <fugang.duan@....com>
To:     Andrew Lunn <andrew@...n.ch>
CC:     "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "martin.fuzzey@...wbird.group" <martin.fuzzey@...wbird.group>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [EXT] Re: [PATCH net 3/4] ARM: dts: imx6: update fec gpr property
 to match new format

From: Andrew Lunn <andrew@...n.ch> Sent: Thursday, May 21, 2020 1:03 AM
> On Wed, May 20, 2020 at 04:31:55PM +0800, fugang.duan@....com wrote:
> > From: Fugang Duan <fugang.duan@....com>
> >
> > Update the gpr property to define gpr register offset and bit in DT.
> >
> > Signed-off-by: Fugang Duan <fugang.duan@....com>
> > ---
> >  arch/arm/boot/dts/imx6qdl.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/imx6qdl.dtsi
> > b/arch/arm/boot/dts/imx6qdl.dtsi index 98da446..a4a68b7 100644
> > --- a/arch/arm/boot/dts/imx6qdl.dtsi
> > +++ b/arch/arm/boot/dts/imx6qdl.dtsi
> > @@ -1045,7 +1045,7 @@
> >                                        <&clks
> IMX6QDL_CLK_ENET>,
> >                                        <&clks
> IMX6QDL_CLK_ENET_REF>;
> >                               clock-names = "ipg", "ahb", "ptp";
> > -                             gpr = <&gpr>;
> > +                             gpr = <&gpr 0x34 27>;
> >                               status = "disabled";
> >                       };
> 
> Hi Andy
> 
> This is the same values as hard coded, so no change here.
> 
> The next patch does not use grp at all. So it is unclear to me if you actually
> make use of what you just added. I don't see anywhere
> 
> gpr = <&gpr 0x42 24>;
> 
> which is the whole point of this change, being able to specify different values.
> 
>       Andrew

Andrew, patch#1 in the series will parse the property to get register offset and bit.
Patch#2 describes the property format as below:
       <&gpr req_gpr req_bit>.
        gpr is the phandle to general purpose register node.
        req_gpr is the gpr register offset for ENET stop request.
        req_bit is the gpr bit offset for ENET stop request.

All i.MX support wake-on-lan, imx6q/dl/qp is the first platforms in upstream to support it.
As you know, most of i.MX chips has two ethernet instances, they have different gpr bit.

gpr is used to enter/exit stop mode for soc. So it can be defined in dtsi file.
"fsl,magic-packet;" property is define the board wakeup capability.

I am not sure whether above information is clear for you why to add the patch set.

Andy

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