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Date:   Fri, 22 May 2020 01:01:53 +0000
From:   Andy Duan <>
To:     Andrew Lunn <>
CC:     "" <>,
        "" <>,
        "" <>,
        "" <>,
        "" <>,
        "" <>
Subject: RE: [EXT] Re: [PATCH net 3/4] ARM: dts: imx6: update fec gpr property
 to match new format

From: Andrew Lunn <> Sent: Thursday, May 21, 2020 9:07 PM
> > Andrew, patch#1 in the series will parse the property to get register offset
> and bit.
> > Patch#2 describes the property format as below:
> >        <&gpr req_gpr req_bit>.
> >         gpr is the phandle to general purpose register node.
> >         req_gpr is the gpr register offset for ENET stop request.
> >         req_bit is the gpr bit offset for ENET stop request.
> >
> > All i.MX support wake-on-lan, imx6q/dl/qp is the first platforms in upstream
> to support it.
> > As you know, most of i.MX chips has two ethernet instances, they have
> different gpr bit.
> >
> > gpr is used to enter/exit stop mode for soc. So it can be defined in dtsi file.
> > "fsl,magic-packet;" property is define the board wakeup capability.
> >
> > I am not sure whether above information is clear for you why to add the
> patch set.
> I understand the patch. What is missing is an actual user, where you have two
> interfaces, doing WOL, with different values for gpr. We don't add new kernel
> APIs without a user.
>     Andrew

Andrew, many customers require the wol feature, NXP NPI release always support
the wol feature to match customers requirement.

And some customers' board only design one ethernet instance based on imx6sx/imx7d/
Imx8 serial, but which instance we never know, maybe enet1, maybe enet2. So we should
supply different values for gpr.

So, it is very necessary to support wol feature for multiple instances.


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