netdev - RE: [EXT] Re: [PATCH net 3/4] ARM: dts: imx6: update fec gpr property to match new format

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Message-ID: <AM6PR0402MB3607365FD8D754B5EDDD5242FFB30@AM6PR0402MB3607.eurprd04.prod.outlook.com>
Date:   Mon, 25 May 2020 02:29:28 +0000
From:   Andy Duan <fugang.duan@....com>
To:     "Fuzzey, Martin" <martin.fuzzey@...wbird.group>
CC:     Andrew Lunn <andrew@...n.ch>,
        "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [EXT] Re: [PATCH net 3/4] ARM: dts: imx6: update fec gpr property
 to match new format

From: Fuzzey, Martin <martin.fuzzey@...wbird.group> Sent: Saturday, May 23, 2020 2:03 AM
> Hi Andy,
> 
> On Fri, 22 May 2020, 03:01 Andy Duan, <fugang.duan@....com> wrote:
> >
> > Andrew, many customers require the wol feature, NXP NPI release always
> > support the wol feature to match customers requirement.
> >
> > And some customers' board only design one ethernet instance based on
> > imx6sx/imx7d/
> > Imx8 serial, but which instance we never know, maybe enet1, maybe
> > enet2. So we should supply different values for gpr.
> >
> > So, it is very necessary to support wol feature for multiple instances.
> >
> 
> Yes, I don't think anyone is saying otherwise.
> 
> The problem is just that there are already .dtsi files for i.MX chips having
> multiple ethernet interfaces in the mainline kernel (at least imx6ui.dtsi,
> imx6sx.dts, imx7d.dtsi) but that this patch series does not modify those files
> to use the new DT format.
> 
For imx6ul/imx6sx/imx7d/imx8mq/imx8mm/imx8mn chips to support wol, 
I plan to submit another dts patch after the patch set is accepted.

If you think add the dts patch appending to the patch set, I will add it in v2.

> It currently only modifies the dts files that are already supported by
> hardcoded values in the driver.
> 
> As to not knowing which instance it shouldn't matter.
> The base dtsi can declare both/all ethernet interfaces with the appropriate
> GPR bits.
> Both set to status = "disabled".
> 
> Then the board specific dts file sets status="okay" and activates wol by adding
> "
> "fsl,magic-packet" if the hardaware supports it (because that depends on
> things beyond the SoC, like how the ethernet PHY is clocked and powered.)
> 
> Martin