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Date:   Tue, 26 May 2020 23:04:26 +0200
From:   Alexandre Belloni <alexandre.belloni@...tlin.com>
To:     Antoine Tenart <antoine.tenart@...tlin.com>
Cc:     davem@...emloft.net, andrew@...n.ch, f.fainelli@...il.com,
        hkallweit1@...il.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com,
        allan.nielsen@...rochip.com
Subject: Re: [PATCH net-next 1/4] net: phy: mscc-miim: use more reasonable
 delays

On 26/05/2020 18:22:53+0200, Antoine Ténart wrote:
> The MSCC MIIM MDIO driver uses delays to read poll a status register. I
> made multiple tests on a Ocelot PCS120 platform which led me to reduce
> those delays. The delay in between which the polling function is allowed
> to sleep is reduced from 100us to 50us which in almost all cases is a
> good value to succeed at the first retry. The overall delay is also
> lowered as the prior value was really way to high, 10000us is large
> enough.
> 
> Signed-off-by: Antoine Tenart <antoine.tenart@...tlin.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@...tlin.com>

> ---
>  drivers/net/phy/mdio-mscc-miim.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/phy/mdio-mscc-miim.c b/drivers/net/phy/mdio-mscc-miim.c
> index badbc99bedd3..0b7544f593fb 100644
> --- a/drivers/net/phy/mdio-mscc-miim.c
> +++ b/drivers/net/phy/mdio-mscc-miim.c
> @@ -44,7 +44,7 @@ static int mscc_miim_wait_ready(struct mii_bus *bus)
>  	u32 val;
>  
>  	readl_poll_timeout(miim->regs + MSCC_MIIM_REG_STATUS, val,
> -			   !(val & MSCC_MIIM_STATUS_STAT_BUSY), 100, 250000);
> +			   !(val & MSCC_MIIM_STATUS_STAT_BUSY), 50, 10000);
>  	if (val & MSCC_MIIM_STATUS_STAT_BUSY)
>  		return -ETIMEDOUT;
>  
> -- 
> 2.26.2
> 

-- 
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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