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Date:   Wed, 27 May 2020 08:08:55 +0300
From:   Leon Romanovsky <leon@...nel.org>
To:     "Saleem, Shiraz" <shiraz.saleem@...el.com>
Cc:     Jason Gunthorpe <jgg@...lanox.com>,
        "Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
        "dledford@...hat.com" <dledford@...hat.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "nhorman@...hat.com" <nhorman@...hat.com>,
        "sassmann@...hat.com" <sassmann@...hat.com>,
        "poswald@...e.com" <poswald@...e.com>
Subject: Re: [RDMA RFC v6 00/16] Intel RDMA Driver Updates 2020-05-19

On Wed, May 27, 2020 at 01:58:01AM +0000, Saleem, Shiraz wrote:
> > Subject: Re: [RDMA RFC v6 00/16] Intel RDMA Driver Updates 2020-05-19
> >
> > On Wed, May 20, 2020 at 12:03:59AM -0700, Jeff Kirsher wrote:
> > > This patch set adds a unified Intel Ethernet Protocol Driver for RDMA
> > > that supports a new network device E810 (iWARP and RoCEv2 capable) and
> > > the existing X722 iWARP device. The driver architecture provides the
> > > extensibility for future generations of Intel HW supporting RDMA.
> > >
> > > This driver replaces the legacy X722 driver i40iw and extends the ABI
> > > already defined for i40iw. It is backward compatible with legacy X722
> > > rdma-core provider (libi40iw).
> > >
> > > This series was built against the rdma for-next branch.  This series
> > > is dependant upon the v4 100GbE Intel Wired LAN Driver Updates
> > > 2020-05-19
> > > 12 patch series, which adds virtual_bus interface and ice/i40e LAN
> > > driver changes.
> > >
> > > v5-->v6:
> > > *Convert irdma destroy QP to a synchronous API *Drop HMC obj macros
> > > for use counts like IRDMA_INC_SD_REFCNT et al.
> > > *cleanup unneccesary 'mem' variable in irdma_create_qp *cleanup unused
> > > headers such as linux/moduleparam.h et. al *set kernel_ver in
> > > irdma_ualloc_resp struct to current ABI ver. Placeholder to  support
> > > user-space compatbility checks in future *GENMASK/FIELD_PREP scheme to
> > > set WQE descriptor fields considered for irdma  driver but decision to
> > > drop. The FIELD_PREP macro cannot be used on the device  bitfield mask
> > > array maintained for common WQE descriptors and initialized  based on
> > > HW generation. The macro expects compile time constants only.
> >
> > The request was to use GENMASK for the #define constants. If you move to a
> > code environment then the spot the constant appears in the C code should be
> > FIELD_PREP'd into the something dynamic code can use.
> >
>
> Maybe I am missing something here, but from what I understood,
> the vantage point of using GENMASK for the masks
> was so that we could get rid of open coding the shift constants and use the
> FIELD_PREP macro to place the value in the field of a descriptor.
> This should work for the static masks. So something like --
>
> -#define IRDMA_UDA_QPSQ_INLINEDATALEN_S 48
> -#define IRDMA_UDA_QPSQ_INLINEDATALEN_M \
> -       ((u64)0xff << IRDMA_UDA_QPSQ_INLINEDATALEN_S)
> +#define IRDMA_UDA_QPSQ_INLINEDATALEN_M GENMASK_ULL(55, 48)
>
> -#define LS_64(val, field)      (((u64)(val) << field ## _S) & (field ## _M))
> +#define LS_64(val, field)      (FIELD_PREP(val,(field ## _M)))
                                                         ^^^^ it is not needed anymore
>
> However we have device's dynamically computed bitfield mask array and shifts
> for some WQE descriptor fields --
> see icrdma_init_hw.c
> https://lore.kernel.org/linux-rdma/20200520070415.3392210-3-jeffrey.t.kirsher@intel.com/#Z30drivers:infiniband:hw:irdma:icrdma_hw.c

I'm looking on it and see static assignments, to by dynamic you will need
"to play" with hw_shifts/hw_masks later, but you don't. What am I missing?

+	for (i = 0; i < IRDMA_MAX_SHIFTS; ++i)
+		dev->hw_shifts[i] = i40iw_shifts[i];
+
+	for (i = 0; i < IRDMA_MAX_MASKS; ++i)
+		dev->hw_masks[i] = i40iw_masks[i];

>
> we still need to use the custom macro FLD_LS_64 without FIELD_PREP in this case
> as FIELD_PREP expects compile time constants.
> +#define FLD_LS_64(dev, val, field)	\
> +	(((u64)(val) << (dev)->hw_shifts[field ## _S]) & (dev)->hw_masks[field
> +## _M])
> And the shifts are still required for these fields which causes a bit of
> inconsistency
>
>
>

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