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Date:   Thu, 28 May 2020 02:41:06 +0300
From:   Vladimir Oltean <olteanv@...il.com>
To:     davem@...emloft.net
Cc:     netdev@...r.kernel.org, andrew@...n.ch, vivien.didelot@...il.com,
        f.fainelli@...il.com, linux@...linux.org.uk,
        antoine.tenart@...tlin.com, alexandre.belloni@...tlin.com,
        horatiu.vultur@...rochip.com, allan.nielsen@...rochip.com,
        UNGLinuxDriver@...rochip.com, alexandru.marginean@....com,
        claudiu.manoil@....com, madalin.bucur@....nxp.com,
        radu-andrei.bulie@....com, fido_max@...ox.ru
Subject: [PATCH net-next 04/11] soc/mscc: ocelot: add MII registers description

From: Maxim Kochetkov <fido_max@...ox.ru>

Add the register definitions for the MSCC MIIM MDIO controller in
preparation for seville_vsc9959.c to create its accessors for the
internal MDIO bus.

Signed-off-by: Maxim Kochetkov <fido_max@...ox.ru>
Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
---
 include/soc/mscc/ocelot.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h
index 79c77aab87e5..85b16f099c8f 100644
--- a/include/soc/mscc/ocelot.h
+++ b/include/soc/mscc/ocelot.h
@@ -394,6 +394,9 @@ enum ocelot_reg {
 	PTP_CLK_CFG_ADJ_CFG,
 	PTP_CLK_CFG_ADJ_FREQ,
 	GCB_SOFT_RST = GCB << TARGET_OFFSET,
+	GCB_MIIM_MII_STATUS,
+	GCB_MIIM_MII_CMD,
+	GCB_MIIM_MII_DATA,
 	DEV_CLOCK_CFG = DEV_GMII << TARGET_OFFSET,
 	DEV_PORT_MISC,
 	DEV_EVENTS,
@@ -481,6 +484,8 @@ enum ocelot_regfield {
 	SYS_RESET_CFG_MEM_ENA,
 	SYS_RESET_CFG_MEM_INIT,
 	GCB_SOFT_RST_SWC_RST,
+	GCB_MIIM_MII_STATUS_PENDING,
+	GCB_MIIM_MII_STATUS_BUSY,
 	REGFIELD_MAX
 };
 
-- 
2.25.1

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