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Date: Thu, 28 May 2020 21:40:01 -0700 From: Jeff Kirsher <jeffrey.t.kirsher@...el.com> To: davem@...emloft.net Cc: Sasha Neftin <sasha.neftin@...el.com>, netdev@...r.kernel.org, nhorman@...hat.com, sassmann@...hat.com, Aaron Brown <aaron.f.brown@...el.com>, Jeff Kirsher <jeffrey.t.kirsher@...el.com> Subject: [net-next 14/17] igc: Add Receive Error Counter From: Sasha Neftin <sasha.neftin@...el.com> Receive error counter reflect total number of non-filtered packets received with errors. This includes: CRC error, symbol error, Rx data error and carrier extend error. Signed-off-by: Sasha Neftin <sasha.neftin@...el.com> Tested-by: Aaron Brown <aaron.f.brown@...el.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com> --- drivers/net/ethernet/intel/igc/igc_mac.c | 1 + drivers/net/ethernet/intel/igc/igc_main.c | 1 + drivers/net/ethernet/intel/igc/igc_regs.h | 1 + 3 files changed, 3 insertions(+) diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c index 9de70a24cb9e..a5a087e1ac02 100644 --- a/drivers/net/ethernet/intel/igc/igc_mac.c +++ b/drivers/net/ethernet/intel/igc/igc_mac.c @@ -241,6 +241,7 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw) rd32(IGC_MCC); rd32(IGC_LATECOL); rd32(IGC_COLC); + rd32(IGC_RERC); rd32(IGC_DC); rd32(IGC_SEC); rd32(IGC_RLEC); diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index 662f06a647e6..e0c45ffa12c4 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -3740,6 +3740,7 @@ void igc_update_stats(struct igc_adapter *adapter) adapter->stats.tpt += rd32(IGC_TPT); adapter->stats.colc += rd32(IGC_COLC); + adapter->stats.colc += rd32(IGC_RERC); adapter->stats.algnerrc += rd32(IGC_ALGNERRC); diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h index a3e4ec922948..7ac3b611708c 100644 --- a/drivers/net/ethernet/intel/igc/igc_regs.h +++ b/drivers/net/ethernet/intel/igc/igc_regs.h @@ -134,6 +134,7 @@ #define IGC_MCC 0x0401C /* Multiple Collision Count - R/clr */ #define IGC_LATECOL 0x04020 /* Late Collision Count - R/clr */ #define IGC_COLC 0x04028 /* Collision Count - R/clr */ +#define IGC_RERC 0x0402C /* Receive Error Count - R/clr */ #define IGC_DC 0x04030 /* Defer Count - R/clr */ #define IGC_TNCRS 0x04034 /* Tx-No CRS - R/clr */ #define IGC_SEC 0x04038 /* Sequence Error Count - R/clr */ -- 2.26.2
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