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Date:   Sat, 30 May 2020 14:18:41 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Vladimir Oltean <olteanv@...il.com>, davem@...emloft.net
Cc:     netdev@...r.kernel.org, andrew@...n.ch, vivien.didelot@...il.com,
        antoine.tenart@...tlin.com, alexandre.belloni@...tlin.com,
        UNGLinuxDriver@...rochip.com, alexandru.marginean@....com,
        claudiu.manoil@....com, madalin.bucur@....nxp.com,
        radu-andrei.bulie@....com, fido_max@...ox.ru, broonie@...nel.org
Subject: Re: [PATCH v2 net-next 05/13] net: mscc: ocelot: convert
 QSYS_SWITCH_PORT_MODE and SYS_PORT_MODE to regfields



On 5/30/2020 4:51 AM, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> Currently Felix and Ocelot share the same bit layout in these per-port
> registers, but Seville does not. So we need reg_fields for that.
> 
> Actually since these are per-port registers, we need to also specify the
> number of ports, and register size per port, and use the regmap API for
> multiple ports.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
> ---
> Changes in v2:
> None.

[snip]


>  	/* Core: Enable port for frame transfer */
> -	ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE |
> -			 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) |
> -			 QSYS_SWITCH_PORT_MODE_PORT_ENA,
> -			 QSYS_SWITCH_PORT_MODE, port);
> +	ocelot_fields_write(ocelot, port,
> +			    QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE, 1);
> +	ocelot_fields_write(ocelot, port,
> +			    QSYS_SWITCH_PORT_MODE_PORT_ENA, 1);

I am a bit confused throughout this patch sometimes SCH_NEXT_CFG is set
to 1, sometimes not, this makes it a bit harder to review the
conversion, assuming this is fine:

Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian

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