netdev - Re: [PATCH 3/3] net: stmmac: Support coarse mode through ioctl

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Message-ID: <20200603161237.GA26729@orolia.com>
Date:   Wed, 3 Jun 2020 18:12:37 +0200
From:   Olivier Dautricourt <olivier.dautricourt@...lia.com>
To:     Richard Cochran <richardcochran@...il.com>
Cc:     Giuseppe Cavallaro <peppe.cavallaro@...com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Jose Abreu <joabreu@...opsys.com>,
        "David S . Miller" <davem@...emloft.net>, netdev@...r.kernel.org
Subject: Re: [PATCH 3/3] net: stmmac: Support coarse mode through ioctl

The 05/26/2020 20:55, Richard Cochran wrote:
> On Thu, May 14, 2020 at 12:28:08PM +0200, Olivier Dautricourt wrote:
> > The required time adjustment is written in the Timestamp Update registers
> > while the Sub-second increment register is programmed with the period
> > of the clock, which is the precision of our correction.
> 
> I don't see in this patch where the "required time adjustment is
> written in the Timestamp Update registers".
> 
> What am I missing?
> 
> Thanks,
> Richard

This routine already exists in the driver (adjust_systime function).
This one is called on ADJ_SETOFFSET in both functionning modes.
So in both modes the phase jump is done by setting the target time in those
update registers, set a flag and waiting for this flag to be cleared, that
would mean that the correction is effective.


Regards,
-- 
Olivier Dautricourt