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Date:   Wed, 24 Jun 2020 10:22:58 -0700
From:   Jakub Kicinski <kuba@...nel.org>
To:     Aya Levin <ayal@...lanox.com>
Cc:     Saeed Mahameed <saeedm@...lanox.com>,
        Bjorn Helgaas <helgaas@...nel.org>,
        "mkubecek@...e.cz" <mkubecek@...e.cz>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Tariq Toukan <tariqt@...lanox.com>, linux-pci@...r.kernel.org,
        Alexander Duyck <alexander.h.duyck@...ux.intel.com>
Subject: Re: [net-next 10/10] net/mlx5e: Add support for PCI relaxed
 ordering

On Wed, 24 Jun 2020 10:34:40 +0300 Aya Levin wrote:
> >> I think Michal will rightly complain that this does not belong in
> >> private flags any more. As (/if?) ARM deployments take a foothold
> >> in DC this will become a common setting for most NICs.  
> > 
> > Initially we used pcie_relaxed_ordering_enabled() to
> >   programmatically enable this on/off on boot but this seems to
> > introduce some degradation on some Intel CPUs since the Intel Faulty
> > CPUs list is not up to date. Aya is discussing this with Bjorn.  
> Adding Bjorn Helgaas

I see. Simply using pcie_relaxed_ordering_enabled() and blacklisting
bad CPUs seems far nicer from operational perspective. Perhaps Bjorn
will chime in. Pushing the validation out to the user is not a great
solution IMHO.

> > So until we figure this out, will keep this off by default.
> > 
> > for the private flags we want to keep them for performance analysis as
> > we do with all other mlx5 special performance features and flags.

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