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Message-ID: <20200625115215.GD2549@kadam>
Date: Thu, 25 Jun 2020 14:52:15 +0300
From: Dan Carpenter <dan.carpenter@...cle.com>
To: kbuild@...ts.01.org, Antoine Tenart <antoine.tenart@...tlin.com>,
davem@...emloft.net, andrew@...n.ch, f.fainelli@...il.com,
hkallweit1@...il.com, richardcochran@...il.com,
alexandre.belloni@...tlin.com, UNGLinuxDriver@...rochip.com
Cc: lkp@...el.com, kbuild-all@...ts.01.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, thomas.petazzoni@...tlin.com
Subject: Re: [PATCH net-next v4 5/8] net: phy: mscc: 1588 block initialization
Hi Antoine,
url: https://github.com/0day-ci/linux/commits/Antoine-Tenart/net-phy-mscc-PHC-and-timestamping-support/20200623-223712
base: https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 8af7b4525acf5012b2f111a8b168b8647f2c8d60
config: x86_64-randconfig-m001-20200624 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-13) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
Reported-by: Dan Carpenter <dan.carpenter@...cle.com>
smatch warnings:
drivers/net/phy/mscc/mscc_main.c:1472 vsc8584_config_init() error: double unlocked 'phydev->mdio.bus->mdio_lock' (orig line 1431)
drivers/net/phy/mscc/mscc_ptp.c:87 vsc85xx_ts_read_csr() error: uninitialized symbol 'blk_hw'.
# https://github.com/0day-ci/linux/commit/b3225965b276bd4f492184090bbac3a117bc77ae
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout b3225965b276bd4f492184090bbac3a117bc77ae
vim +1472 drivers/net/phy/mscc/mscc_main.c
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1326 static int vsc8584_config_init(struct phy_device *phydev)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1327 {
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1328 struct vsc8531_private *vsc8531 = phydev->priv;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1329 int ret, i;
deb04e9c0ff2b4 drivers/net/phy/mscc/mscc_main.c Michael Walle 2020-05-06 1330 u16 val;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1331
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1332 phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1333
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1334 mutex_lock(&phydev->mdio.bus->mdio_lock);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1335
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1336 /* Some parts of the init sequence are identical for every PHY in the
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1337 * package. Some parts are modifying the GPIO register bank which is a
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1338 * set of registers that are affecting all PHYs, a few resetting the
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1339 * microprocessor common to all PHYs. The CRC check responsible of the
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1340 * checking the firmware within the 8051 microprocessor can only be
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1341 * accessed via the PHY whose internal address in the package is 0.
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1342 * All PHYs' interrupts mask register has to be zeroed before enabling
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1343 * any PHY's interrupt in this register.
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1344 * For all these reasons, we need to do the init sequence once and only
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1345 * once whatever is the first PHY in the package that is initialized and
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1346 * do the correct init sequence for all PHYs that are package-critical
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1347 * in this pre-init function.
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1348 */
deb04e9c0ff2b4 drivers/net/phy/mscc/mscc_main.c Michael Walle 2020-05-06 1349 if (phy_package_init_once(phydev)) {
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1350 /* The following switch statement assumes that the lowest
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1351 * nibble of the phy_id_mask is always 0. This works because
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1352 * the lowest nibble of the PHY_ID's below are also 0.
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1353 */
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1354 WARN_ON(phydev->drv->phy_id_mask & 0xf);
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1355
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1356 switch (phydev->phy_id & phydev->drv->phy_id_mask) {
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1357 case PHY_ID_VSC8504:
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1358 case PHY_ID_VSC8552:
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1359 case PHY_ID_VSC8572:
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1360 case PHY_ID_VSC8574:
00d70d8e0e7811 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1361 ret = vsc8574_config_pre_init(phydev);
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1362 break;
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1363 case PHY_ID_VSC856X:
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1364 case PHY_ID_VSC8575:
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1365 case PHY_ID_VSC8582:
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1366 case PHY_ID_VSC8584:
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1367 ret = vsc8584_config_pre_init(phydev);
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1368 break;
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1369 default:
00d70d8e0e7811 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1370 ret = -EINVAL;
75a1ccfe6c726b drivers/net/phy/mscc.c Bryan Whitehead 2019-11-13 1371 break;
1e8795b1b20d27 drivers/net/phy/mscc.c kbuild test robot 2019-11-16 1372 }
00d70d8e0e7811 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1373
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1374 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1375 goto err;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1376 }
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1377
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1378 phy_base_write(phydev, MSCC_EXT_PAGE_ACCESS,
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1379 MSCC_PHY_PAGE_EXTENDED_GPIO);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1380
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1381 val = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1382 val &= ~MAC_CFG_MASK;
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1383 if (phydev->interface == PHY_INTERFACE_MODE_QSGMII) {
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1384 val |= MAC_CFG_QSGMII;
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1385 } else if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1386 val |= MAC_CFG_SGMII;
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1387 } else if (phy_interface_is_rgmii(phydev)) {
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1388 val |= MAC_CFG_RGMII;
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1389 } else {
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1390 ret = -EINVAL;
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1391 goto err;
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1392 }
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1393
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1394 ret = phy_base_write(phydev, MSCC_PHY_MAC_CFG_FASTLINK, val);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1395 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1396 goto err;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1397
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1398 if (!phy_interface_is_rgmii(phydev)) {
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1399 val = PROC_CMD_MCB_ACCESS_MAC_CONF | PROC_CMD_RST_CONF_PORT |
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1400 PROC_CMD_READ_MOD_WRITE_PORT;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1401 if (phydev->interface == PHY_INTERFACE_MODE_QSGMII)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1402 val |= PROC_CMD_QSGMII_MAC;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1403 else
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1404 val |= PROC_CMD_SGMII_MAC;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1405
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1406 ret = vsc8584_cmd(phydev, val);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1407 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1408 goto err;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1409
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1410 usleep_range(10000, 20000);
e8e4223046e19d drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1411 }
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1412
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1413 /* Disable SerDes for 100Base-FX */
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1414 ret = vsc8584_cmd(phydev, PROC_CMD_FIBER_MEDIA_CONF |
49113d5e0c3f3f drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-06-05 1415 PROC_CMD_FIBER_PORT(vsc8531->addr) |
deb04e9c0ff2b4 drivers/net/phy/mscc/mscc_main.c Michael Walle 2020-05-06 1416 PROC_CMD_FIBER_DISABLE |
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1417 PROC_CMD_READ_MOD_WRITE_PORT |
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1418 PROC_CMD_RST_CONF_PORT | PROC_CMD_FIBER_100BASE_FX);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1419 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1420 goto err;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1421
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1422 /* Disable SerDes for 1000Base-X */
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1423 ret = vsc8584_cmd(phydev, PROC_CMD_FIBER_MEDIA_CONF |
49113d5e0c3f3f drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-06-05 1424 PROC_CMD_FIBER_PORT(vsc8531->addr) |
deb04e9c0ff2b4 drivers/net/phy/mscc/mscc_main.c Michael Walle 2020-05-06 1425 PROC_CMD_FIBER_DISABLE |
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1426 PROC_CMD_READ_MOD_WRITE_PORT |
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1427 PROC_CMD_RST_CONF_PORT | PROC_CMD_FIBER_1000BASE_X);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1428 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1429 goto err;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1430
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 @1431 mutex_unlock(&phydev->mdio.bus->mdio_lock);
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1432
1bbe0ecc2a1a00 drivers/net/phy/mscc.c Antoine Tenart 2020-01-13 1433 ret = vsc8584_macsec_init(phydev);
1bbe0ecc2a1a00 drivers/net/phy/mscc.c Antoine Tenart 2020-01-13 1434 if (ret)
fa164e40c53b38 drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-13 1435 return ret;
1bbe0ecc2a1a00 drivers/net/phy/mscc.c Antoine Tenart 2020-01-13 1436
b3225965b276bd drivers/net/phy/mscc/mscc_main.c Quentin Schulz 2020-06-23 1437 ret = vsc8584_ptp_init(phydev);
b3225965b276bd drivers/net/phy/mscc/mscc_main.c Quentin Schulz 2020-06-23 1438 if (ret)
b3225965b276bd drivers/net/phy/mscc/mscc_main.c Quentin Schulz 2020-06-23 1439 goto err;
^^^^^^^^
This should be a direct return.
b3225965b276bd drivers/net/phy/mscc/mscc_main.c Quentin Schulz 2020-06-23 1440
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1441 phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1442
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1443 val = phy_read(phydev, MSCC_PHY_EXT_PHY_CNTL_1);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1444 val &= ~(MEDIA_OP_MODE_MASK | VSC8584_MAC_IF_SELECTION_MASK);
1ac7b090ec4618 drivers/net/phy/mscc.c Antoine Tenart 2020-02-26 1445 val |= (MEDIA_OP_MODE_COPPER << MEDIA_OP_MODE_POS) |
1ac7b090ec4618 drivers/net/phy/mscc.c Antoine Tenart 2020-02-26 1446 (VSC8584_MAC_IF_SELECTION_SGMII << VSC8584_MAC_IF_SELECTION_POS);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1447 ret = phy_write(phydev, MSCC_PHY_EXT_PHY_CNTL_1, val);
09d65e6d631c05 drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1448 if (ret)
09d65e6d631c05 drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1449 return ret;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1450
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1451 if (phy_interface_is_rgmii(phydev)) {
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1452 ret = vsc85xx_rgmii_set_skews(phydev, VSC8572_RGMII_CNTL,
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1453 VSC8572_RGMII_RX_DELAY_MASK,
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1454 VSC8572_RGMII_TX_DELAY_MASK);
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1455 if (ret)
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1456 return ret;
2283a02b67d412 drivers/net/phy/mscc/mscc_main.c Vladimir Oltean 2020-03-24 1457 }
dee48f78d02e15 drivers/net/phy/mscc/mscc_main.c Antoine Tenart 2020-03-19 1458
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1459 ret = genphy_soft_reset(phydev);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1460 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1461 return ret;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1462
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1463 for (i = 0; i < vsc8531->nleds; i++) {
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1464 ret = vsc85xx_led_cntl_set(phydev, i, vsc8531->leds_mode[i]);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1465 if (ret)
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1466 return ret;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1467 }
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1468
c227ce4423855b drivers/net/phy/mscc.c Heiner Kallweit 2019-08-17 1469 return 0;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1470
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1471 err:
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 @1472 mutex_unlock(&phydev->mdio.bus->mdio_lock);
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1473 return ret;
a5afc1678044a3 drivers/net/phy/mscc.c Quentin Schulz 2018-10-08 1474 }
---
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