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Message-ID: <de66eb53b15376161bca59e13f147a5ee4f36c33.camel@perches.com>
Date: Thu, 25 Jun 2020 20:12:03 -0700
From: Joe Perches <joe@...ches.com>
To: Jeff Kirsher <jeffrey.t.kirsher@...el.com>, davem@...emloft.net
Cc: Alice Michael <alice.michael@...el.com>, netdev@...r.kernel.org,
nhorman@...hat.com, sassmann@...hat.com,
Alan Brady <alan.brady@...el.com>,
Phani Burra <phani.r.burra@...el.com>,
Joshua Hay <joshua.a.hay@...el.com>,
Madhu Chittim <madhu.chittim@...el.com>,
Pavan Kumar Linga <pavan.kumar.linga@...el.com>,
Donald Skidmore <donald.c.skidmore@...el.com>,
Jesse Brandeburg <jesse.brandeburg@...el.com>,
Sridhar Samudrala <sridhar.samudrala@...el.com>
Subject: Re: [net-next v3 12/15] iecm: Add singleq TX/RX
On Thu, 2020-06-25 at 19:07 -0700, Jeff Kirsher wrote:
> From: Alice Michael <alice.michael@...el.com>
>
> Implement legacy single queue model for TX/RX flows.
[]
> diff --git a/drivers/net/ethernet/intel/iecm/iecm_singleq_txrx.c b/drivers/net/ethernet/intel/iecm/iecm_singleq_txrx.c
[]
> @@ -145,7 +508,63 @@ static void iecm_rx_singleq_csum(struct iecm_queue *rxq, struct sk_buff *skb,
> struct iecm_singleq_base_rx_desc *rx_desc,
> u8 ptype)
> {
[]
> + if (ipv4 && (rx_error & (BIT(IECM_RX_BASE_DESC_ERROR_IPE_S) |
> + BIT(IECM_RX_BASE_DESC_ERROR_EIPE_S))))
> + goto checksum_fail;
> + else if (ipv6 && (rx_status &
> + (BIT(IECM_RX_BASE_DESC_STATUS_IPV6EXADD_S))))
> + goto checksum_fail;
> +
> + /* check for L4 errors and handle packets that were not able to be
> + * checksummed due to arrival speed
> + */
> + if (rx_error & BIT(IECM_RX_BASE_DESC_ERROR_L3L4E_S))
> + goto checksum_fail;
[]
> +checksum_fail:
> + dev_dbg(rxq->dev, "RX Checksum not available\n");
If there's an actual checksum arrival speed issue,
then likely this dbg output should be ratelimited too.
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