netdev - Re: [PATCH v3 net-next 1/6] net: dsa: felix: clarify the intention of writes to MII

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Message-ID: <f4d6c69c-868a-deaf-333b-c2534aca8485@gmail.com>
Date:   Sun, 5 Jul 2020 14:11:08 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Vladimir Oltean <olteanv@...il.com>, davem@...emloft.net,
        netdev@...r.kernel.org
Cc:     andrew@...n.ch, vivien.didelot@...il.com, claudiu.manoil@....com,
        alexandru.marginean@....com, ioana.ciornei@....com,
        linux@...linux.org.uk
Subject: Re: [PATCH v3 net-next 1/6] net: dsa: felix: clarify the intention of
 writes to MII_BMCR



On 7/5/2020 9:16 AM, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> The driver appears to write to BMCR_SPEED and BMCR_DUPLEX, fields which
> are read-only, since they are actually configured through the
> vendor-specific IF_MODE (0x14) register.
> 
> But the reason we're writing back the read-only values of MII_BMCR is to
> alter these writable fields:
> 
> BMCR_RESET
> BMCR_LOOPBACK
> BMCR_ANENABLE
> BMCR_PDOWN
> BMCR_ISOLATE
> BMCR_ANRESTART
> 
> In particular, the only field which is really relevant to this driver is
> BMCR_ANENABLE. Clarify that intention by spelling it out, using
> phy_set_bits and phy_clear_bits.
> 
> The driver also made a few writes to BMCR_RESET and BMCR_ANRESTART which
> are unnecessary and may temporarily disrupt the link to the PHY. Remove
> them.
> 
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian